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Found interesting sawtooth timebase circuit. Pls help me analyze it

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Yansi:
Hello,

yesterday, I was tinkering with some ideas what circuits to build and test while being locked down at home during the crisis. My eyes catched upon the phantastron vacuum tube sawtooth oscillator. Looking for something to read about it, I have found this page:
https://www.radartutorial.eu/17.bauteile/bt52.en.html

At the end of the article there is this interesting solid-state equivalent circuit, using just three transistors:



Looks very neat. The article however does not explain how does it work. I have tried understanding it, but quite failed at first, then figured it out, almost. It seems there may be mistakes in the drawing.

The analysis:

It seems the circuit is a combination of the classical schmitt trigger and a miller integrator (as kindly pointed out by the article).

T3 is the miller integrator. The circuit should have two states: Integrating and reset.  Now looking at it, I think there are three states actually: Integrate, idle, reset to name them.

Obviously, in the integrating state, T2 needs to be open to allow integration to happen (T3 is the integrator).

Issue number one: For positive base current to T3, the collector voltage of T3 (or T2 respectively) should go down, not up. Meaning the symbol with the output waveform is backwards. The circuit produces negative sloped ramp, not positive as shown.

It seems to me that the bas voltage (R2 R8 divider) determines the lower threshold of the ramp voltage. When the ramp reachest down to that threshold, T1 is open, T2 closed and integration stopped. Circuit entering the idle state.

In the idle state, C2 (the integrating capacitor) starts to charge back up, until it charges completely to Vcc-Vbe(T3).

However, I do not understand fully, how the circuit gets retriggered.  I think the circuit stays in the "idle" ("armed") state until a retrigger pulse occurs on the input left.  So it is not an oscillator, just monostable delay.

It seems to me, that the retrigger (to enter the "reset" state) works by shunting the base current from T3 through the C2, D1 and C1 to the input. A short negative trigger pulse deprives T3 of base current, which brings T1 emitter voltage high, closes T1 and opens T2, leading to start of another integration phase.

Have I analyzed it correctly so far?

What I do not understand now, is why the modulation voltage is applied at the cathode of D1. Wouldn't it make more sense to modulate the input current of the miller integrator, i.e to change current through R5? (R5 variable, or fixed with variable control voltage to it)

//EDIT: Typos.

iMo:
A simulation is your friend..
PS: the values chosen are rather experimental, such it works somehow..

Yansi:
Well, my favourite simulator tool is a soldering iron. I can't still get used to those simulator software.

Below is my result. Used a bit different values (and omitted R10 from the circuit). 

Very interesting, poking around this circuit.

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