frequency counter front end

[electros6]

HI,
     I designed a frequency counter using CPLD that counts upto 50MHZ , but I found problem in designing the analog front end. I know what front end analog circuit does. I go through various frequency counter schematics they all used differential receiver at the front end with ECL. I know it is  faster due to non saturation of transistor. most of the theory said that the differential receiver was used for gain and Schmitt trigger. can I used just opamp amplifier and a  Schmitt trigger in the front end . Is it work.............

[tom66]

For a 50MHz signal, you could probably use an op-amp, but it will be difficult to design a good amplifier especially if the op-amp will be frequently saturating, like as a schmitt trigger. Why not use a dedicated comparator? You can convert ECL output into ordinary TTL... a quick search brings up this -- http://www.onsemi.com/PowerSolutions/product.do?id=MC100ELT25

[David Hess]

If you want to use high impedance passive probes then you will need an FET buffer of some sort.

RF frequency counter front ends use limiting amplifiers to create a saturated signal for driving the following logic but DC coupled lower frequency ones use a comparator with hysteresis.  If you use a fast enough comparator, then you do not need anything else.

It might be worth using an adaptive trigger circuit:

http://www.linear.com/docs/4390