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Generic deep memory data acquisition system

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allanw:
I was thinking up of something ridiculously ambitious to attempt to do for next year. I'd like to make a data acquisition system that takes standard computer DDR2 RAM modules and buffers data in there before transferring it out with USB. Theoretically it's possible with dual channels to get to 1600Mbit/s (which is only 200M/s at 8-bits)

Since this would require an FPGA anyway, I thought it'd be a good idea to just make it a modular DAQ: have an FPGA board with generic inputs and build separate input boards that have specific ADC's. For instance, one input could be a 14-bit ADC at 100MS/s and a different one could be an 8-bit ADC at 200 Msamples/s. This also cleanly separates the analog and digital portions of the system.

The Spartan-6's are low-cost and already have two memory controllers on-board. There's a relatively cheap $200 dev board with 128Mbytes of DDR2 RAM on there already. The only issue is the cost of the software and the additional cost of using the memory controller, which I haven't really researched yet.

But is this something that will have a use? The benefit is that with 4 gigs of ram, you can acquire a full 2.5 seconds of data at 200M/s. I know 200M/s isn't all that impressive but it seems like it's impossible to get any faster storage with using off-the-shelf technology. If the waveform is repetitive and I can get sampling clock jitter low enough, then the equivalent sampling rate would be ridiculously high, which could be useful, right?

Or maybe I should try DDR3, which is twice as fast as DDR2. But then there aren't cheap dev boards with that and I'd have to lay out a board myself which is definitely a daunting 6-layer task.

A company called Ultraview sells DAQ's that also stream to PCIe (2Gbit/s (but where does it go?)) which seems to be the next plateau in sampling speed. Picoscope also offers similar ones. They are both above $4000 which seems expensive to me.

I thought it'd be interesting to do it to learn about high speed design and could be useful to others if well documented. Any thoughts?

slburris:
The Spartan 6 has only 1 non-BGA package, the 128 pin quad flat pack, and that package
doesn't have memory controllers.  Availability of any Spartan 6 chip seems to be pretty
poor, except at Avnet.

That being said, are you planning on using a dev board and building daughterboards for it
that take the RAM modules?  Or do you have the capability to mount BGAs?

You could get your speed up by using RAM modules in parallel, although the details
get trickier as you go wider.

Whose dev board do you like?  I only know of the Digilent Atlys which is
$199 for students, but $349 for me.

I've tried hard to convince Digilent that hobbyists are "students of life" but
they aren't buying it :-(


Scott

allanw:
Going to have to use BGA's for this. I can probably hand solder them with a reflow oven.

Yep I got the $200 Digilent board (student here :)). Initially I'll see if this is feasible with the on-board 128MB DDR, and then develop a prototype with DDR2 slots. Unfortunately it seems like 6 layers is the minimum here, with 4/4 spacing and tiny holes. Each prototype board revision is going to cost at least $500 which sucks since I've never actually done any high speed design before. Hopefully I can get it right after reading the tons of app notes available and finding some good simulation software. I'll start off small with the relatively high speed ADC boards for this dev board first though.

I'm splitting this up with a partner - he will do the Verilog and digital work and I'll figure out the analog and board-level stuff. We actually don't really know how DDR2 works, so it's going to take some research into seeing what kind of continuous bandwidth is achievable for parallel DDR sticks. (is one stick more parallel than one DDR chip or what?) Luckily the hardware memory controller handles much of the details.

If this works out then the next step is to build the ultimate DAQ with DDR3 and PCI-Express.

slburris:
For the DDR memory design, you'll need to make sure your PCB traces to memory are approximately equal
length if you want to run the memory at full speed, I think.

But if you are taking on BGAs, you probably have PCB software that helps out with that :-)

Does it make any sense to capture to static RAM and then use the SDRAM as a
deep store?  You might be able to burst capture at higher speeds for a bit
given the simpler timing.  I don't know -- it's an interesting problem.

Scott

allanw:
Yes, SRAM might be necessary, to buffer up enough data to write to DDR at once. The memory on the FPGA might not be fast enough to do it. However it seems like it'd be a very complex scheme of writing to the SRAM as fast as possible while reading from another one into the FPGA into DDR.

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