help with TEC driver

[apraxophobia]

Working on a basic TEC driver.

Architecture shown in diagram- high side fet, sense resistor, before an H bridge.

The parameters are nothing crazy. It's designed for 3A, 12V. Everything is in more-or-less working order; differential amp works well, setpoint, H-bridge, etc. There's a low-pass on the gate for stability, but that's not relevant (I think).

It works well up to ~.5A-- Vset and Vsense are dead on-- above which it completely and suddenly overshoots the setpoint, maxing out the current. I've directly probed the op amp inputs while this happens; bizarrely, V+ (Vsense) > V- (Vset), and yet the op amp continues to decrease!?!? until it hits 0V (the bottom rail). It won't move again until the setpoint moves back to zero.

Any ideas for what could cause this? I've replaced op amps, double checked gate capacitance, etc., and everything seems fine... I am completely out of ideas.

[coppercone2]

I recommend using this circuit instead

https://www.homemade-circuits.com/wp-content/uploads/2022/12/single-door-refrigerator-circuit.jpg

less trouble

https://www.rigidhvac.com/mini-compressors

[beenai2018]

Im not sure if you had a chance to see this .

https://www.ti.com/lit/an/snoaa72a/snoaa72a.pdf?ts=1732198622716




It looks like the current is measured in line with load and is bidirectional for the implementation in the paper.

[coppercone2]

it also has a true H-bridge

The first schematic is drawn 'funny'. I don't know what is going on there.

If you have a odd circuit stability problem like this, chances are you don't wanna put a block diagram. A block diagram is for a working system. Why should we play mad libs with your block diagram?

Things like your component choice might be important. I love how the power transistor is nameless and the H-bridge is nameless and some how the feedback loop is 'probobly not important' for a f eedback control circuit.

[Andree Henkel]

@ apraxophobia

Your control amplifier seems to be connected wrong:
the control voltage needs to be at + input, the sense via resistor to - input,
thus you get negative feedback around your control loop.

additional you need a capacitor between output and - Input of your control amplifier
such you get an integral regulator consisting of cap, amp and resistor to - Input

[apraxophobia]

Are you sure? If Vset<Vsense (current too high), output increases, closing the fet, decreasing current? Maybe I am misunderstanding.