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GPS 1pps how to fanout
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rakeshm55:
Hi,
I would like to use XM1100 GPS module in one of my project. It has a 1pps output.
I would like to distribute this signal to two separate modules. Which buffer should I use for this purpose??
IF i use an ordinary buffer with wont is affect the jitter characteristics of ipps.
Are there sophisticated buffers available which can have very low propagation delay across o/p pins.
 
NivagSwerdna:
Simple approach.... 74HC04D if you can afford 12ns (Feed input into one gate and use it's output to drive the others)
rakeshm55:
For 3.3V wont it be 50ns approx  (24ns + 24ns ) ....http://www.ti.com/lit/ds/symlink/sn74hc04.pdf
How did you arrive at 12ns
TomS_:

--- Quote from: rakeshm55 on January 21, 2019, 12:40:08 pm ---For 3.3V wont it be 50ns approx  (24ns + 24ns ) ....http://www.ti.com/lit/ds/symlink/sn74hc04.pdf
How did you arrive at 12ns

--- End quote ---

You wont want to use HC logic parts for 3V3 operation, 3V3 may only barely meet the logic HIGH threshold if at all. LVC (Low Voltage CMOS) which is intended for use with lower voltages would be better.

74LVC04 has a typical propagation delay of 2.5ns at 3V3, if that matters.

e.g. http://www.ti.com/lit/ds/symlink/sn74lvc04a.pdf
awallin:
For 1PPS I've used IDT 5PB1108
https://www.idt.com/products/clocks-timing/clock-distribution/clock-buffers-drivers/5pb1108-18-v-33-v-18-lvcmos-high-performance-clock-buffer

if you tie a few (4-5) outputs together then it drives around 2.7V into a 50R load. It has internal 50R series termination, so connecting outputs together reduces the output impedance from the ideal 50R - a trade-off to pay for the 2.7V into 50R...
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