EEVblog Electronics Community Forum
Electronics => Projects, Designs, and Technical Stuff => Topic started by: TopQuark on February 01, 2022, 01:31:04 pm
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Built something cool, thought I'd share the design.
So I am in the process of designing a precision lab power supply, and I am looking for some way to generate a sharp pulse load to test the load step response of my design. IMO the gold standard design for wideband DC load is Jim William's design in Application Note 133, a 100A load with 540kHz bandwidth. However, that was designed over 10 years ago, and I thought the design could be simpler and higher performance using newer chips, and components outside of Linear Tech.
My DC load design uses the FDL100N50F 500V 100A mosfet as the main switch. A 10mR shunt measures the current, which is then amplified by 10 with a LTC6228 chosen for high BW and low noise. The error amp is a OPA2810, which is what I had on hand, and had enough speed. A BUF634A replaces the complicated MOSFET drive circuitry in Jim Williams design with a single chip.
I built the thing by hacking and tweaking the circuit on a copper clad board, so I need some time to reverse engineer what I had actually done while building the thing and draw up a proper schematic :-DD. In the mean time, I thought I'd share a photo of the build and a couple of waveform screen shots. If you have ideas on what tests I could do with it, I'd be more than happy to perform them.
The measured rise time for 1A -> 20A is 221.7ns, which translates into around 1.5MHz of bandwidth. The fall time is 168.7ns, but there are some bouncing at the tail end. Currently the power source is a Riden power supply hooked to the load with long leads and 1000uF at the load input. I am hoping the bouncing would go away with better test setup, otherwise I'll have to lower the bandwidth of the load and see if it improves.
Green trace: Control signal from function generator 500mV/div
Blue trace: Current shunt signal with 10x gain, 5A/div
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Used a LiPO with shortened leads as the power source to minimise parasitic inductance. Was able to squeeze out a bit more performance with such a setup, getting 0A -> 50A steps with clean-ish <200ns rise and fall time. Testing with unprotected LiPO is honestly scaring the sh*t out of me, luckily there were no sparks and fire. Drawing the schematic of the design after this post...
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Hand drawn simplified schematics to match the messy construction of the circuit build :P, I can clarify details if needed. I ripped the compensation network straight out of Jim William's original design in AN133, but the MOSFET driver circuitry is greatly simplified with the BUF634A.
More performance can probably be squeezed out of the design if a lower gate capacitance MOSFET is used, but I like the 100N50F wide DC rated SOA. Components are just what I had on hand, not very optimised. I also did not run any simulations for the circuit, so there could be hidden stability issues with the circuit, I don't know.
Construction technique is quite important for the fast-ish signal and high di/dt involved. Minimise inductance at all cost for the MOSFET and shunt resistor loop. Minimise parasitic capacitance when constructing the LTC6228 circuit (I used a single sided copper clad board). I can't route the input control signal from the SMA connector to the circuit with 50ohm trace impedance with a single sided board, so I just used a piece coax as a jumper.
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Needing to always be aware of grounding of scope/source makes this one a little less convenient than the one from Williams.
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I don't disagree, grounding is an issue to look out for (notice the piece of paper isolating the connectors and probes ground from the heatsink). But I think the circuit is still useful for its intended purpose of testing floating power supplies.
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What's the deal with the diode on LTC output?
It would seem to me that due to cable capacitance, the output of this stage can only decrease by 50% in a single step and then you wait for the combined 4kΩ of resistance to discharge the cable while continuously outputting half of momentary cable voltage. Meanwhile, the LTC loses regulation and saturates to ground.
With 125pF, the time constant is 0.5µs :o
Could this be the reason for your settling problems?
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Hmm, good point. I added the diode to the output of the LTC6228 because its output can't swing to ground, so I just hacked in a diode to solve that, I didn't want to introduce a negative supply rail. The current monitor output is connected to a 10x scope probe, and the cathode of the output diode is floating in mid air, so I guesstimate the capacitance be at the range of 50pF. But I agree I should look into improving that node.
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I would consider just adding a virtual ground with some TL431 and be done with it.
I think all those chips will be fine with reduction of positive supply to 15.5V ;)
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I hacked this thing together to test a power supply design quickly, I'll probably add a virtual ground or split rail if I design a proper circuit board for this circuit, for now I'll just load the output with 300 ohm and low-Z probe the output and deal with the attenuation. Probing it properly did reveal some nasty artefacts, but after changing compensating network, I have a clean and symmetric rise and fall time of 280ns.
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Blew up my janky hand wired dynamic load, decided this thing is useful enough for me to design a proper circuit board for it.
Screenshot shows the load cell with the FETs, shunt and driver opamp. The load cell board will be manufactured with JLCPCB's single layer aluminium PCB process. Heat pipes will be soldered to the two long edge of the board as bus bar and heat spreader.
With the change of MOSFET, I figured out I could still get high bandwidth without using the BUF634A, saving a bit of BOM cost.
Have yet to design the control board that goes on top of this load cell board, still internally debating if I should just have 50 ohm control signal input for connecting to function generator, or should I go digital and have the thing generate pulse control signals itself.
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Here's the prototype of the dynamic load I made before sending out the PCB, without using the BUF634A. The performance is worse, with 0A->50A taking around 600ns and 50A->0A taking 450ns. Though I can't claim >1MHz bandwidth with this design, this version should still be plenty good for testing power supplies.
I know clamping the output of the opamp with a diode is not ideal, but I'm too lazy to adjust the negative power supply rail to a more reasonable value.
The aluminium PCB version uses two FETs to reach 100A max, this serves as a proof of concept showing the BUF634A-less version still performs quite well.
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At 100A, the shunt you have chosen won‘t survive long as it will have to dissipate 100W
That‘s 100 times the rated power and might not even be permissible for pulse load.
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At 100A, the shunt you have chosen won‘t survive long as it will have to dissipate 100W
That‘s 100 times the rated power and might not even be permissible for pulse load.
That's not really an issue, you usually only keep the output on for few tens of usec, and keep duty cycle to around 0.1%. My prototype using a 2W 0.01R resistor has been happily operating with 0.1% duty cycle, 20 usec, 50A pulses for hours without issue. The final PCB will be using 5W 0.02R resistors. The circuit is designed to generate pulse load to check for regulator transient response, not for long term static loading.
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I'd be rather more worried about the poor transistor. ;D
But yeah, some µs, not a big deal. Nice low duty cycle, it's fine.
Nice build!
Think the last time I made a 100A pulsed load, used an IGBT... but it also wasn't controlled, just a pulse transformer for gate drive, and a 1 ohm (metal film) load resistor (out of a 100V source). I built that for calibrating current probes, actually; the high voltage probably helps with slew rate (which I think was IGBT-limited anyway, so, maybe not even all that much help?), and, hence why it wasn't a controlled load.
Tim
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The aluminium dynamic load board populated with parts and heat pipes, thing of beauty imo.
I'm going to experiment with MCU generated load pulses. The STM32G431 DAC should be fast enough when running at 15MSPS and 12-bit of resolution should be plenty for its intended purpose of generating step loads for transient load testing.
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Things took an interesting turn recently. I have been tasked with designing a high performance laser driver by my boss, which basically is a dynamic load on steroids. You insert a laser diode between a power supply and the dynamic load, and you have yourself a laser diode current controller.
Before you ask, I work for M-Labs (https://m-labs.hk/ (https://m-labs.hk/)) and literally all hardware (https://sinara-hw.github.io/ (https://sinara-hw.github.io/)) and software (https://m-labs.hk/experiment-control/artiq/ (https://m-labs.hk/experiment-control/artiq/)) we design and sell is open source, fiercely so, so don't worry about discussing stuff openly.
The thing should compete with existing high performance laser drivers, like (https://www.koheron.com/photonics/ctl200-digital-laser-controller (https://www.koheron.com/photonics/ctl200-digital-laser-controller)), initial specs are as follows:
- 300 mA current
- 4V compliance
- 10 MHz modulation bandwidth through analog input (!)
- 20 ppm/K stability (!!)
- 500 nA current setting resolution through DAC (!!)
- 300 pA/rt Hz of noise at 10kHz (!!!)
- 300 nA rms noise from 10Hz to 1MHz (!!!)
I realise this conversation might turn into a discussion on laser drivers, but there's nothing stopping you from ripping the power supply and laser diode from the circuit and leaving you with a ridiculously high performance dynamic load, also my design is an extension of the original dynamic load project, so I thought I'd continue using this thread.
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Should it be high side?
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We are only interested in driving butterfly laser packages mounted directly on the board, these lasers are floating so both high or low side drive is fine.
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We are only interested in driving butterfly laser packages mounted directly on the board, these lasers are floating so both high or low side drive is fine.
I'm curious, what is the final application for those modulated butterfly lasers?
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We are only interested in driving butterfly laser packages mounted directly on the board, these lasers are floating so both high or low side drive is fine.
I'm curious, what is the final application for those modulated butterfly lasers?
TBH I don't have much clue on how the thing is going to be used at the end, I am an EE, not a physicist. My understanding is the laser optical frequency changes by around 3 MHz per uA you pass through it. If you need a stable laser wavelength, you need a really stable current source. The modulation input is there so that you can close loop lock the laser wavelength at some specific value, or add frequency sidebands to the output, or so I've been told.
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We are only interested in driving butterfly laser packages mounted directly on the board, these lasers are floating so both high or low side drive is fine.
Low side makes the analogue input the most straightforward.
How about a Sziklai pair with DC stabilization?
PS. or should it be push-pull to beat the inductance into submission when necessary?
PPS. I just remembered a thread (https://www.eevblog.com/forum/projects/uber-low-noise-current-source-suggestions/msg2525748/#msg2525748) on much the same topic a couple years ago. The external modulation seems to tend to be just 50 Ohm impedance bias tee, even butterfly laser diodes don't seem to have enough capacitance to make it matter.
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- 300 mA current
- 4V compliance
- 10 MHz modulation bandwidth through analog input (!)
- 20 ppm/K stability (!!)
- 500 nA current setting resolution through DAC (!!)
- 300 pA/rt Hz of noise at 10kHz (!!!)
- 300 nA rms noise from 10Hz to 1MHz (!!!)
This specs looks nice, I would be interested in using them for experiments given the price is reasonable. However compared to the Vescent D2-105 we are now using, it seems there is still room for improvement.
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There's some discussion about designing such a current source from the open source hardware group our company contributes to, and there's a nice compilation of prior art and commercial products in the market (https://github.com/sinara-hw/Driver/issues/1 (https://github.com/sinara-hw/Driver/issues/1)). We are not designing according to the specs given there, but the discussion there is interesting nevertheless.
We are only interested in driving butterfly laser packages mounted directly on the board, these lasers are floating so both high or low side drive is fine.
Low side makes the analogue input the most straightforward.
How about a Sziklai pair with DC stabilization?
PS. or should it be push-pull to beat the inductance into submission when necessary?
PPS. I just remembered a thread (https://www.eevblog.com/foruhttps://arxiv.org/pdf/0805.0015.pdfm/projects/uber-low-noise-current-source-suggestions/msg2525748/#msg2525748) on much the same topic a couple years ago. The external modulation seems to tend to be just 50 Ohm impedance bias tee, even butterfly laser diodes don't seem to have enough capacitance to make it matter.
A design based on a Sziklai pair is documented here (https://sci-hub.se/https://doi.org/10.1063/1.3600602 (https://sci-hub.se/https://doi.org/10.1063/1.3600602)) with good results. The performance is good, but relies on a proper negative rail to work properly. We are hoping to power our design with a single 12v power supply like the rest of the boards we sell, so I am hoping we only need a lowish current -5v rail for opamps (e.g. from a charge pump), but not a proper negative rail with laser current flowing through.
- 300 mA current
- 4V compliance
- 10 MHz modulation bandwidth through analog input (!)
- 20 ppm/K stability (!!)
- 500 nA current setting resolution through DAC (!!)
- 300 pA/rt Hz of noise at 10kHz (!!!)
- 300 nA rms noise from 10Hz to 1MHz (!!!)
This specs looks nice, I would be interested in using them for experiments given the price is reasonable. However compared to the Vescent D2-105 we are now using, it seems there is still room for improvement.
The Vescent design is based on the OG Libbrecht and Hall design (https://sci-hub.3800808.com/10.1063/1.1143949 (https://sci-hub.3800808.com/10.1063/1.1143949)). The design is well and proven, with improvements given here (https://arxiv.org/pdf/1604.00374.pdf (https://arxiv.org/pdf/1604.00374.pdf)) and newer DAC controlled version documented here (https://arxiv.org/pdf/0805.0015.pdf (https://arxiv.org/pdf/0805.0015.pdf)).
The way modulation is done in the Libbrecht and Hall design is really smart IMO, with the input current from the modulation input going directly into the current path and the opamps supporting the modulation circuit only has to be low noise, but not necessary fast enough to catch up with the input signal.
The thing is we want 3 switchable ranges of modulation sensitivity like what Koheron offers (https://www.koheron.com/photonics/ctl200-digital-laser-controller (https://www.koheron.com/photonics/ctl200-digital-laser-controller)), and that is really difficult to do with the Libbrecht and Hall design. You basically need to switch out 4 precision matched resistors at the same time.
The other thing is the Libbrecht and Hall method of modulation relies on having opamps generate 2 x Vout and -2 x Vout, with Vout being the laser anode voltage. This is easy if your laser drive is on the high side, so Vout max is the compliance voltage (3-4 volt ish), but difficult and inefficient if the laser drive is on the low side, where Vout max is your compliance voltage + max drop across resistor + voltage drop across control transistor. Even if you generate the necessary voltages, losses gets high.
IMO, the Libbrecht and Hall design makes modulation easy by using high side drive, and high side drive is easy if you float your voltage reference above ground and only use a trim pot to adjust the current like they did. If you want a DAC controlled current, you need to float both the voltage reference and DAC above ground as documented here (https://arxiv.org/pdf/0805.0015.pdf (https://arxiv.org/pdf/0805.0015.pdf)), or level shift a ground referenced DAC output signal to the error amplifier input (with precision, low noise and low drift).
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What I am thinking of doing, and suspect how Koheron is doing with theirs design, is to sum the slow precision current control signal (i.e. signal from the vref and DAC) with the DC - 10M modulation input and present the resulting signal at the error amplifier input. This necessitates building a really fast (>= 10M bandwidth) current control loop, but modulation with stitchable range can be done really easily.
Traditionally, the approach to designing laser current source/sink is to slow down the control loop to prevent oscillations, relying on the series pass transistor being quiet (using BJT, JFET), and add an additional circuit for the current modulation. But as I have mentioned in the post above, this approach naturally results in a high side current source with fixed modulation range, which is the opposite of what I want to build.
My theory is by using a fast control loop with high open loop gain at lower frequency, the error amplifier (low noise opamp) can eliminate the noise generated by the series transistor. That way, even a MOSFET with high 1/f noise can be used as the series pass element.
As a proof of concept, I have built a hand etched single layer prototype with just parts I have laying around at home, schematics shown below. I am measuring 900 pA/ rt Hz of noise at 10 kHz, not bad for junk bin parts, but 3 times what our specs dictates and 9 times higher than what zrq is using. However, there's many room for improvements that I have identified for the next revision.
First is the power supply, the best LDO I had laying around is the LT3081, which is good but not great in terms of output noise. Intuitively, if the error amplifier is low noise and the control loop is fast, the power supply voltage noise should not contribute much to the current noise figure. However, the series pass MOSFET I am using has around 2000pF of output capacitance, and any high frequency noise passes directly through it, no matter how low noise you error amplifier is, or how fast of high gain your control loop is.
Second is the voltage reference I am using, it is a ADR421 from taobao with markings scrubbed off :palm:, I had to swap out a few until I got a stable output voltage. Even if it was a genuine part, the noise specs of the ADR421 is not great.
After blaming the parts I am using, the third issue, a design issue, I suspect is the filter buffering the vref, with R1 and R2 contributing to the noise. The original idea is to utilise the MAX5719 (the only obtainable 20 bit un-buffered output DAC right now) DAC's 2k output resistance (R1) as part of a filter, but I suspect R2, C4, C6 (X7R, again, what I had on hand) is contributing much noise to the circuit.
Another issue with designing the circuit this way, is you can't just stick a huge cap on the error amp non-inverting input to quiet down the input, any noise present at the non-inverting input directly translates to output noise.
Anyways, for a first attempt, I am ok with the performance of this circuit. Plan is to spend some time to actually simulate the circuit rather then relying on good old intuition, build the next iteration with a PCB with more than 1 layer and with proper parts, and see where I am at. If the noise spec is still not good enough then, I can always just bump up the value of the shunt to improve the current noise spec :-DD.
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Also I am getting 10MHz of modulation bandwidth with the current prototype, not too shabby for the minimal amount of tuning effort I have put in. One can easily use this circuit as a dynamic load with 10M bandwidth lol
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IMO, the Libbrecht and Hall design makes modulation easy by using high side drive, and high side drive is easy if you float your voltage reference above ground and only use a trim pot to adjust the current like they did. If you want a DAC controlled current, you need to float both the voltage reference and DAC above ground as documented here (https://arxiv.org/pdf/0805.0015.pdf (https://arxiv.org/pdf/0805.0015.pdf)), or level shift a ground referenced DAC output signal to the error amplifier input (with precision, low noise and low drift).
If you want to have a bias current through the output stage, even near zero current through the laser diode, to maintain bandwidth you'll always need a floating precise source regardless.
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Think it is more about whether the control input signal from the DAC is referenced to ground or referenced to the positive power supply rail, which is the case for the Libbrecht - Hall design.
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Also I am getting 10MHz of modulation bandwidth with the current prototype
How badly is that affected by low bias current? Say a mA modulated by 100 uA.
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Also I am getting 10MHz of modulation bandwidth with the current prototype
How badly is that affected by low bias current? Say a mA modulated by 100 uA.
Can't tell, the current prototype lacks a negative supply rail so I can't set the current that low :palm:. Will check in the next iteration.
Anyways, I think the laser driver is more suited for another topic, I'll start a new thread about the laser driver and keep this one for dynamic loads.
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I allowed myself a bit of time to work on the slimmed down version of the dynamic load. I realised the STM32G431 has all the opamps, ADC, DAC peripherals needed for the project, and I only need the MCU plus a few resistors to make the whole thing work, making it worth the trouble to actually source a STM32 in this day and age.
I bodged together a control board with a dev board and a few resistors, wrote a minimum viable prototype firmware to drive the DAC and opamps to generate some pulses. The code is minimal to a point where it relies on a JLink debugger to set the duty cycle and amplitude if you want to change the settings while the board is running. Crude, but it works.
I've created a github repo for the code (https://github.com/TopQuark12/pulseLoadG431), I know it is not the best quality code out there and god forbid my boss from seeing it, but give it some time and something nice may come out of it.
Anyways, I am getting some reasonably clean 50A 2.5us rise and fall pulse loads out of the system, pretty nice considering the entire circuit consist of 1 voltage regulator, 2 chips, 2 MOSFETs and a few R and C.
(C2 is sum of current from both MOSFETS, C4 is control signal generated by the DAC)
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May I suggest you add a Lasorb.
Www.lasorb.com (http://Www.lasorb.com)
For environmental protection of the laser.
Steve