Guard ring and internal EMC

[sylv1p]

Hello all,

I'm about to create a new board, including a lot of high speed components (gigabit ethernet, wifi, USB3.0 and so on) and I would like to have some advices from people already faced of such issues.

The layout is based on a rectangular circuit (see attached picture), with a guard ring at the circonferance of the board with screws attached to the chassis. The signal ground is decoupled from the guard ring with several couple of R//C (4K7 and 100nF) close to the screw, and others couple R//C close to the shielded connectors.

I have some additionnal questions:
1. Is this a good idea to open the gard ring to avoid any ground loop? If so, where is it more efficient? close to the power supply area or at the opposite?
2. The DC connection between the signal ground and the chassis ring should be done via a ferrite bead. This connection could be achieve by a simple trace isn't it? This connection should be located close to the power supply?
3. I read in a post:

At the same time you can use the guard ring to mitigate emc problems as well... Any internal emc shielding should be connected only to the real ground and not to chassi ground.

It's a bit confusing for me.. Do I need to place a screw in the middle of the board, close to a switching bulk converter for exemple, this screw connected to a small square shielding trace, where the noisy trace around the converter could be decoupled with R//C? Or I'm totally wrong and the noisy trace should be simply tied to the signal ground?


Thanks a lot in advance for your time and your answers,
Sylv1.

[wraper]

Are you trying to make an antenna?

[ogden]

1. Is this a good idea to open the gard ring to avoid any ground loop?

I don'e see much difference between ring and loop. - Very bad idea. Most likely your "guard ring" make things way worse than would be in case of plain, simple solid ground plane.

[sylv1p]

You suggest to remove the guard ring and replace it by a basic signal ground? with screws close to the connectors? hum.. I though that having a shielding plan would help to make the noise away from signal ground.

[ogden]

You suggest to remove the guard ring and replace it by a basic signal ground? with screws close to the connectors? hum.. I though that having a shielding plan would help to make the noise away from signal ground.

Don't invent wheel - check other PCB's to confirm what I am saying and others will tell you as well. Check PC motherboard PCB's - photos or one you perhaps have on hand. There are many reference designs of high speed boards, loads of hi-end FPGA board Gerber files around. Also many mixed signal chip manufacturers are providing application notes regarding board layout design.

[sylv1p]

Thank you for your reply ogden,

I didn't invent wheel (I hope so) My drawing in the attached picture results from a lot of research on many forums, application notes, blogs, books... also some people here who desing telecom products... As you said, I already looked at industrial boards. On my desk, I have an industrail PC from SIEMENS, several eval boards from texas, and all have a guard ring.
So maybe you right by saying that is much more easier to go with a basic signal ground plan, maybe a guard ring should not be use in some cases, and maybe it  has to be done very carefully. That's why I post on this forum, to get help and advices.

[ogden]

You described quite generic board. Nothing close to very sensitive (amplification of very low signals) or very powerful (high currents) or passing EMI tests, so generic rules apply - don't bother.

On my desk, I have an industrail PC from SIEMENS, several eval boards from texas, and all have a guard ring.

Please tell which exactly TI eval boards you are talking about so we can check

[edit] I'v seen dozens of various TI eval boards and/or their documentation. Isolated mounting screws - yes. Split analog/digital grounds - very rarely. Guard ground rings: none. Never saw such.

[wraper]

PLCs and other industrial stuff works in a very noisy environment with a lot of transients. If there is something like this, most likely it was done to protect from extreme external interference, not the other way around.

[sylv1p]

You right I have no high impedance circuitries on my board, no analog part. So maybe need I to pay attention to emission rather than to imunity. But the board will be located into a noisy cabinet, including high voltage switching... Ethernet, USB and videos cables shielding inside the cabinet will probably get a lot of noise.

Basically, we used to draw our boards as shown in the attached pictures. Maybe it's enough...     

I also attached the pdf of the AM57x eval board from texas

 

[sylv1p]

Hi wrapper,

The board will e located in a high noisy environnement

[ogden]

I also attached the pdf of the AM57x eval board from texas

Does not help. It's just schematics, word "ring" is not even mentioned

[sylv1p]

I have no gerber, so.. trust me there is one that goes all around the board with many couples of R//C. Look at p2/27 of the PDF, you will see the R//C drawn next to the mounting holes. also, the guard ring is cut (probably to avoid current loop)

[sylv1p]

I post some pictures

[wraper]

I post some pictures

At least on the right picture it looks like simply adding ground plane on external layer in addition to internal ground plane that covers a whole board.

[sylv1p]

Yes, but this plan goes all around the board. The internal GND and this plan are decoupled by many capacitors, mostly close to the shielded connectors and the mounting holes.

[wraper]

Yes, but this plan goes all around the board. The internal GND and this plan are decoupled by many capacitors, mostly close to the shielded connectors and the mounting holes.

All ports I see are Ethernet. For Ethernet quality of shielding does not matter that much but for USB it's very important, especially in industrial environment. USB connection will be simply falling off in noisy environment if shield connection is insufficient. What I can think about that, it's not for EMC reasons but to avoid high current flow due to difference in ground potential between the devices. Ethernet is isolated by transformers anyway so something like this would be reasonable.

[ogden]

Ok. Seems like weird no-compromises industrial design. Out of my scope. What I know - even hi-end telco equipment does not have such rings. If this is hobby project - IMHO you are wasting time. If this is *not* hobby project and you are building commercial product for company then just contact TI field application engineer and ask him. After all you are using TI chip and have question about TI reference design. Other option: ask TI E2E forums. Just make sure you post in the right forum.

[2N3055]

Schematic shows 3 separate grounds. One is common ground for all the digital electronics, one is filtered ground for audio interface, that is connected through filter to common ground.
It also shows a separate ESD protection ground. Power switch, USB ground, and Ethernet shield are connected to that. It doesn't show how is that connected to common ground. Probably at a single point at a common grounding point that will discharge away ESD pulse. It would have to be single separated solid plane, or a case. A loop would just increase coupling of the pulse. If there was a visible ring on the outer layer, it was probably there to ensure connection with the case. And was coupled directly to internal solid layer. And case. Or a shield.
That's just a guess. I would ask TI application engineers what they had in mind and why.

[T3sl4co1l]

Ok. Seems like weird no-compromises industrial design. Out of my scope. What I know - even hi-end telco equipment does not have such rings. If this is hobby project - IMHO you are wasting time. If this is *not* hobby project and you are building commercial product for company then just contact TI field application engineer and ask him.

Agreed, if it doesn't matter, it doesn't matter; and if it does, well, FAEs are rough at best regarding EMC work, but that would be something I suppose.  Personally, it's something I'd want to sit down and scratch on a bit of paper about, as far as doing anything beyond a single ground plane.

But if you'd like some consultation to that effect, that could be arranged.

Tim

[sylv1p]

Thanks a lot for your time guys.
I will ask FAEs and post their feedback to keep you in touch.

[Siwastaja]

Note that designing for isolated (Ethernet) or non-isolated (USB) is very different in principle.

If designing for USB, look at USB design examples.

In an isolated-case design, there may be non-EMI reasons to include that isolation! With Ethernet, isolation always comes automatically "for free", so not directly grounding the case to the internal ground may make sense - the design can be used where isolation is needed. This doesn't automatically signify this was done for better EMI.

[ogden]

Thanks a lot for your time guys.
I will ask FAEs and post their feedback to keep you in touch.

Had to make clear your case for myself, did a little reading. Your "guard ring" is just chassis ground - typical in Ethernet devices which are properly designed for SFTP (shielded Ethernet cable) and not only. Usually it does not go all around the board, resides where connectors are. Appnotes say that chassis ground (where cable shield and center taps of magnetics connected) shall be separated from signal ground, they shall not overlap (!) and those two grounds shall be connected together using either 1) 0 Ohm resistor 2) ferrite bead 3) EMI capacitor+resistor. Which type of interconnection you shall use - whole another can of worms.

As you don't have gerbers, question about where exactly connection(s) between two grounds are located, is still open. Yet usually you don't interconnect grounds in multiple places, definitely not all around your PCB. You care about ground loops - most likely know why. So it means that your original plan to put ground interconnecting capacitors around ground plane does not do any good but quite opposite - it may create ground loops. Imagine stray AC currents flowing through chassis due to whatever reason. Anyway I am very curious what FAE will tell you.

[sylv1p]

Appnotes say that chassis ground (where cable shield and center taps of magnetics connected) shall be separated from signal ground, they shall not overlap (!) and those two grounds shall be connected together using either 1) 0 Ohm resistor 2) ferrite bead 3) EMI capacitor+resistor.

I read this notes. Several others application notes talk about such way to draw. Sometime the recommended decoupling components are 0ohm, sometimes ferrite bead sometime R//C. It's a bit confusing. I assume that it depend of the application, the kind of environnement, if the box is metalic or not, if the board is screwed or not... I read a lot about EMC books or so, but never rich to find a good explanation.

For the moment the first feedback I have from TI is that the guard ring is used to prevent EMC coming from the internal components, so for emission purpose.

[sylv1p]

Hi all,

I hope you spent a good week end

Bad news from TI:

Our primary business is semi-conductors. We do not have a comprehensive knowledge of system related issues associated with developing a production product. Therefore, we cannot provide guidance on this topic.
I do not know why the guard ring topology was chosen for this design (EVM board) and cannot justify this approach over other alternatives.

well... I need to go ahead, so I think I will start with a chassis plan that group all shielded connectors, decoupled from the signal ground with 1MEG//100nF. The EMC test will validate if capacitors are enough or must be replaced by ferrite bead. The chassis is metalic and connected to the earth, so it make sense for me to connect the screws to the chassis plan. In term of equipotential, I will tied the signal ground to the chassis via screws as well. I hope I will not have any ground loop current between chassis signal ground, capa and chassis plan... In my point of view, the impedance of the loop should be low enough. The box of the chassis is quite small, so... we will see

Regards,
Sylv1.