Hi all! I am building my first H bridge for an spwm signal.
You can see via the picture, but here is another description:
I have an FPGA that generates the different duty cycles needed to make a sine wave. Data one in the pic generates one half of the wave while data 2 generates the other. The Verilog is solid, I highly doubt that is causing the issue.
I have four irf724n mosfets with 10k ohm pulldowns at the gate, the load is connected across as in the pic.
The trouble is, no matter what voltage supply I connect to the H bridge, the signal remains the same size and is very not sinusoidal. Also no matter the load it doesn't draw any current (or so small my meter can't read it).
Any thoughts? Thanks!