Electronics > Projects, Designs, and Technical Stuff

Have You Ever Changed a Circuit Only to Make the Schematic Look Better?

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rrinker:
 I did this. Again, only at the PCB stage. The schematic was neat enough. Laying out the circuit to prototype on a breadboard worked ok, and once I had the code good, it all worked as expected. Then I went to draw a PCB for it. No matter how I tried arranging things, I had far too many lines trying to cross over one another to make a neat and orderly PCB. I realized in looking at what was happening, that if I changed the pin usage a bit on my micro, I could get clean shots from the pins to the pullups/component being controller/external connector. Bingo, much cleaner PCB layout, and all I had to do was change some initialization code at the beginning to swap the pins around.

 I never felt a schematic should reflect any sort of physical layout of the circuit. Maybe that's the wrong way to go about it, but I use the schematic to display the logical connection of components in a neat and organized fashion. An input jack on the schematic may be on the left side of the sheet, but on the actual PCB maybe it's on the bottom, or the right side of the board. (ok, maybe not a great example, being in a left to right oriented country, I would tend to want the inputs to be on the left and outputs on the right of the actual PCB). Plus things get modularized in the schematic, not everything has 'wires' going to it, sometimes there are just tags. When it all fits on one page, I just put it on one page, but for something more complex, perhaps the power circuit would be on one page, the main processor and I/O on another, and output circuits on a third page. Just to keep it organized.

IDEngineer:
Arrrggg... I HATE labels on signals (when they're used as substitutes for actual lines on the page). Particularly on a multipage schematic. You never know when you've found all of the connections! It would be more acceptable of the schematic/layout application auto-appended to the label an indication of this/quantity (example: "clock 3/5" meaning this is the third of five references to that label), because then you'd know if you'd missed one and how many total implicit connections there are to that common "point".

Another pet peeve is ground/earth symbols that point up. Yes, I've seen that. Multiple times. I always wonder if the person was (mis)using that symbol while trying to indicate something OTHER than ground/earth/common, or if they were just incredibly unbelievably lazy. Bottom line, it makes the schematic less clear when they use a very well known symbol in some nonstandard way... what exactly are they trying to convey? Do you dare presume they knew what they were doing? (If they're misusing symbols like that, the answer is obviously NO.)


--- Quote from: rrinker on September 23, 2019, 09:04:43 pm ---I realized in looking at what was happening, that if I changed the pin usage a bit on my micro, I could get clean shots from the pins to the pullups/component being controller/external connector. Bingo, much cleaner PCB layout, and all I had to do was change some initialization code at the beginning to swap the pins around.
--- End quote ---

100%agree, and the way I've solved this for years now on embedded MCU systems is that, for any given connection to the MCU, I provide a list of acceptable pins to the PCB Designer. They can then optimize pin assignments. I personally review each and every PCB layout before boards get prototyped, so I have the final say, but my Designers have told me that this is an INCREDIBLY helpful technique for them. Unless we're dealing with a parallel bus or something similar, the code usually doesn't care what I/O pin is used for a given function and there's no impact on cycle time. But it makes the Designer's job a lot easier, and I get far cleaner layouts as a result. There have been a few boards where the Designer has flat-out told me they were able to slash the layer count solely because I didn't force them to use specific pins. That pays dividends in reliability and economy on every unit.

SiliconWizard:

--- Quote from: IDEngineer on September 23, 2019, 09:28:43 pm ---Arrrggg... I HATE labels on signals (when they're used as substitutes for actual lines on the page). Particularly on a multipage schematic. You never know when you've found all of the connections! It would be more acceptable of the schematic/layout application auto-appended to the label an indication of this/quantity (example: "clock 3/5" meaning this is the third of five references to that label), because then you'd know if you'd missed one and how many total implicit connections there are to that common "point".

--- End quote ---

That's what ERC is used for. I would personally never design a moderately complex circuit, especially if it's multi-page, without running ERC. And I have a strict NO UNCONNECTED PIN policy. If you want to leave a given pin NC on purpose, you explicitely flag it as such, and ERC will then ignore it. This way an unconnected signal is unlikely. With some EDA software, you can even define your own additional ERC rules that would be adapted to your specific design. Very handy. I would not rely on eye-checking a schematic only unless it's very simple (which of course doesn't mean I only rely on ERC either. Don't twist logics here). To each their own methods.

It's kind of funny how this labels thing is almost as debated and as controversial as "spaces vs. TABs", or other topics of this kind. Everyone will usually stick to their ideas with a force.

As any method, it requires common sense and consistency to be usable, and then everyone pretty much has a different notion of what good style is. But just because you have once seen horror schematics with labels doesn't mean you should never use any. That's sometimes where it becomes a bit religious. ;D

mikerj:

--- Quote from: IDEngineer on September 23, 2019, 09:28:43 pm ---Arrrggg... I HATE labels on signals (when they're used as substitutes for actual lines on the page). Particularly on a multipage schematic. You never know when you've found all of the connections! It would be more acceptable of the schematic/layout application auto-appended to the label an indication of this/quantity (example: "clock 3/5" meaning this is the third of five references to that label), because then you'd know if you'd missed one and how many total implicit connections there are to that common "point".

--- End quote ---

On schematics drawn in Pads every label has a list of pages where that label is used.  Even better, on a schematic PDF generated by Pads you can click a label and it will jump to the next location that label is used.  Not a cheap tool however.

taydin:
I think this disagreement about label use is because limitations of ECAD tools. For example, if the schematic capture program would be able to very nicely highlight a net so you see EVERYTHING attached to it (even in multi page, multi hierarchy designs), this label discussion wouldn't really happen, and everybody would be using labels. But it's really hard to get net highlighting to work in multipage, nested subcircuit, hierarchical designs.

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