Author Topic: High speed design  (Read 2655 times)

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Offline georgegTopic starter

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High speed design
« on: June 20, 2012, 04:10:42 pm »
What are high speed back plane and mid plane design? Why are high speed designs more popular nowadays?
 

Offline T4P

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Re: High speed design
« Reply #1 on: June 20, 2012, 04:15:07 pm »
Why are high speed designs more popular nowadays?

Duh. What is the world now without high speed? USB? SATA3?
 

Offline Time

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Re: High speed design
« Reply #2 on: June 20, 2012, 05:39:43 pm »
because faster is better.
-Time
 

Offline typeglob

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Re: High speed design
« Reply #3 on: June 20, 2012, 08:38:21 pm »
because faster is better.
... and faster is often cheaper than more at a lower speed. They'll run links in parallel again once they've saturated the bandwidth.
 

Offline Mechatrommer

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Re: High speed design
« Reply #4 on: June 21, 2012, 06:25:13 am »
there will be always room for improvement... USB10, 1THz 1TBps speed 8bit bus... USB20 1PHz 1PBps, 32bit bus. :P
« Last Edit: June 21, 2012, 06:26:49 am by Mechatrommer »
Nature: Evolution and the Illusion of Randomness (Stephen L. Talbott): Its now indisputable that... organisms “expertise” contextualizes its genome, and its nonsense to say that these powers are under the control of the genome being contextualized - Barbara McClintock
 

Offline amspire

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Re: High speed design
« Reply #5 on: June 21, 2012, 06:57:29 am »
because faster is better.
... and faster is often cheaper than more at a lower speed. They'll run links in parallel again once they've saturated the bandwidth.
They will not go back to parallel when they cannot get any more serial speed. They may run multiple serial links - each independent.
 

Offline ejeffrey

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Re: High speed design
« Reply #6 on: June 21, 2012, 07:34:51 am »
In fact they already do.  PCI express x1 is a single (bidirectional) serial link.  x4 and x16 are multi-lane serial links, but it isn't correct to say that it is a 4- or 16- bit parallel link.  The channels are largely independent at the electrical level (each channel generates its own recovered clock) and the controller stripes data byte-by-byte (not bit-by-bit) over the active channels.

Parallel buses are still the king for extremely high bandwidth, low latency, close range connections like on-chip data bus, a memory bus, or a ADC connection, but as soon as you want to transmit more than a few cm, it is time to serialize (if you want high speed).
 


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