Yeah, ideally you have an analog comparator input to reset the output latches. Failing that, an ADC running a few times faster than Fsw is needed. It doesn't need to be terribly fast if you're doing average current mode control (you have some leeway thanks to the filter inductance time constant), but if you need true within-cycle sensing then it's got to be fast enough.
Mind that, for a large inductance time constant, you don't want peak mode control (fault detection that way is fine, of course), which causes chaotic behavior.
With 300kS/s available for Fsw = 30kHz, it should be fine either way.
Alternately, an external latch and/or disable, maybe triggered by a fixed (fault level) comparator, or a (DAC adjustable) threshold level, would be the hardware approach.
Tim