I recently found this JFET bootstrap documentation (see pp. 16-18 of attached Linear systems application note file) and this forum has helped me tremendously in determining it usefulness for large gain transimpedance (TIA) design.
I would like to share how I convinced myself that the JFET improves the noise and stability performance of a TIA system I am designing for a project using a SFH2440 photodiode.
DISCLAIMER: I am not the savviest with op amp and semiconductor/transistor circuit analyses… so please excuse my mundane interpretation and feel free to share better ways to interpret how the JFET effects a TIA circuit. With that said lets jump into it! This is where the
starts...
There is a TLDR below.My “aha” moment was when I reconfigured the JFET circuit (left) into its equivalent small signal lumped model (right) as shown in the image "JFET Bootstrap Circuits".
https://www.eevblog.com/forum/projects/help-me-understand-photodiode-amplifier-jfet-bootstrap/?action=dlattach;attach=2123060;imageReferring to the rightmost circuit, the “magic” of the JFET is the fact that the gate-drain capacitance (Cgd = 2 pF) is in series with the junction capacitance of a photodiode (Cj = 135 pF). As the Cj >> Cgd, the equivalent capacitance connected at the -IN terminal will be ~ Cgd. (I see it as the JFET acts like path of least resistance for the AC current coming from the feedback loop back into the -IN node of the TIA).
To supplement what @Tim Fox, @Marco, and @moffy (Reply 1-3) described… the JFET reduces the noise gain -> NG = 1 + Rf/X-IN(f) (where Rf is the feedback resistor and X-IN(f) is the equivalent reactance of the capacitance found at -IN terminal of the op amp at frequency = f) seen by the input of the op amp.
Proof is in the pudding, I simulated the effect of the JFET with some SPICE (using the left circuit from "JFET Bootstrap Circuits). The frequency response for the TIA system without a JFET is shown in image "f response no JFET".
https://www.eevblog.com/forum/projects/help-me-understand-photodiode-amplifier-jfet-bootstrap/?action=dlattach;attach=2123072;imageThe PM of the OPA1655 without a JFET is 78° which indicates a stable system. Notice that the NG at f = 10 kHz is 37.85 dB (= 91 V/V) and peaks to a value of 43 dB for higher frequencies. The NG I calculated at f = 10 kHz was 38.6 dB at Cj = 135 pF and Rf = 10 MΩ. The input voltage noise density of the OPA1655 is 2.9 nV/√Hz, multiply that by NG and you get an output voltage noise density contribution of ~ 265 nV/√HZ.
The simulation for the frequency response with the JFET bootstrap is is shown in in image "f response with JFET".
https://www.eevblog.com/forum/projects/help-me-understand-photodiode-amplifier-jfet-bootstrap/?action=dlattach;attach=2123066;imageNotice for this case that the NG here is ~ 15 dB less than the f response for the TIA without the JFET at f = 10 kHz. Calculating the NG using C-IN = 4 pF and Rf = 10 MΩ gave me ~ 7 dB which does not agree well with the simulation… probably because I did not account for the ~ 10 pF from the op amp input (or the JFET spice model actually has a Cgd > 2 pF). The 23 dB from the frequency response corresponds to a C-IN ~ 15 pF). The output voltage noise density contribution by the op amp input voltage noise density of the JFET bootstrap is ~ 30 nV/√HZ when a JFET bootstrap is used.
Despite the disagreement between the simulation and calculated values… the takeaway here is that the JFET bootstrap does lower NG due to lowering the effective capacitance at -IN. This is useful for high gain TIA and/or an op amp with relatively high input noise voltage density (> 5 nV/√Hz) where reverse biasing the photodiode does not reduce the capacitance at the -IN enough to lower NG.
For comparison, the Rf noise (which does not vary whether a JFET is used in the TIA… to my knowledge) for a 10 MΩ feedback resistor at 25 °C (298 K) is ~ 405 nV/√HZ. So, by simply using a JFET bootstrap, the contribution of the input voltage noise density is less than ±3x that of the Rf voltage noise density (i.e., the contribution of the op amp input voltage noise density to the total output voltage noise density is negligible compared to that of Rf).
A quick note on stability as the JFET bootstrap could also help with improving stability/distortion for TIA systems with lower Rf values and GBW. A general rule of thumb you want to ensure that fi = GBW*Cf/(C-IN + Cf) > fp = 1/2*pi*Rf*Cf for your output signal to not be unstable.
For example, lets assume an op amp to be used has a GBW of 2 MHz and the fp of the system designed must be > 150 kHz (so fp = 150 kHz), and Rf = 1 MΩ. The corresponding Cf must be ≤ 1pF to satisfy this criterion. If C-IN = 144 pF (no JFET) and Cf = 1 pF, fi = 125 kHz which is < fp, typically corresponding to less stability/more distortion in the output. If C-IN = 4 pF (no JFET), fi = 400 kHz which is > fp corresponding to a more stable output. The simpler solution to improve fi would be to simply find a op amp with greater GBW.
TLDR: For large gain TIA systems, the JFET bootstrap method helps in 2 ways:
1. It will significantly lower (not eliminate) the op-amps input noise contribution to the total output noise to the point that it is typically no longer the dominant source of noise of the TIA (for feedback resistance values ≥ 1MΩ). (From my analysis the thermal noise of the feedback resistor will be the dominant source of noise afterwards for large gain TIA systems.
2. Lowering the capacitance at the -IN terminal of the op amp to < 20 pF (assuming stray capacitance is minimized in the PCB) can significantly help with improving the stability of the TIA (for lower gains/feedback resistance values ≤ 1 MΩ) by typically allowing the use of feedback capacitance (≥ 1 pF) which are more practical to achieve in physical circuit designs.
Despite these improvements, if a low noise system is desired… ensure to minimize photodiode shot noise and feedback resistor thermal noise as they tend to become the dominant noise sources in the JFET bootstrap TIA configuration (good luck with resistor thermal noise…).