I'm good! I've actually just been a NikonWeb lurker, I just signed up so maybe together we can breathe some life back into it!
That's very cool, that site has a lot of good information and gathered all of the ones who are interested on the subject, i hope it remains alive.
I am not surprised about the tantalums, in no small part because of Dave's videos. I've only done a few quick tests (I also got an original AC adapter) and the DSUs boot and the camera fires and winds, but they're not without issue. The displays have a lot of horizontal smearing, one has a busted character LCD, the SRAM batteries are probably long dead, I'm sure there's more. I'd love to round up an old Macintosh to run the full kit and see if the old SCSI hard drives are still kicking too. Thank you for the offer for help!
Yeah, having an original set would be really cool, as far as i know there are no complete systems that are actually functional, NikonWeb webmaster itself made a post about his struggle and even with his working set couldn't download the pictures.
Tantalums on mine were kind of scary, the body just bursted in smoke while testing some simple stuff, internal battery must be replaced but that's easy, is detailed on the schematics, i guess is only for the RTC, the RAM is actually DRAM and it should work regardless of the battery.
Character LCD looks like a regular 16x2 or 20x2 parallel input, very popular on the Arduino stuff except it comes presoldered with an i2c converter board.
The HDD can be fun, maybe recovering some of the remaining data can shed some info on it's past life, you can easily test those with an external enclosure on an old Macintosh, doing a full dump and examining it with some hex editor.
Lastly the horizontal smearing on the LCD... i've seen on laptops that they have a lot of smearing and sometimes is caused by leaky SMD caps, i've replaced a few with some success, is a good idea to check them out.
Since I can't comment on NW yet, your progress is amazing! Your drawing of Lenna is great, and the images you're getting are already super impressive.
Thank you!
Thinking about it and poking through the schematics I've got questions and thoughts for you:
- Which way does the sensor read out? Line by line, or column by column?
It is line by line, as viewed from the view finder is left to right and top to bottom, so the read image doesn't need to be reversed or mirrored. There's a shift register prior to the first line and a gets loaded with the first line when V1 and V2 signals are sent, that moves all the image on the sensor one pixel closer to the shift register, then the shift register spits one pixel at a time.
- Could the slant in your images come from expecting an extra pixel per row, or one missing clock?
It is some sort of jitter and missing one pixel on the logic analyzer (i'm using a $10 24mhz one), making some lines one pixel shorter, stealing it from the next line thus shifting it on pixel to the left
- Could some of what's flat white be the CCD saturating and blooming, if you have to manually light it up with a flash?
On another topic i've asked to the gurus on the site about it and while i was testing what they were asking me, the thing started to improve a lot, all the artifacting was gone, leaving me only with the left side bloom, and everyone pointed out it can be some ccd driving problem.
Thinking about it i found that i'm turning off and on all the electronic at the start of each line, that can easily be the cause of the bloom since the electronics aren't settle when i'm exposing, i've tryed to correct some of the code and the winder stopped giving me data so... i need further work on the code.https://www.eevblog.com/forum/projects/any-ccd-sensor-guru-in-the-house-is-my-ccd-damaged
- The schematics aren't super clear where the camera interfaces with the DSU, but given the rest of the design does there need to be more termination/buffering on the receiving end of the clock/data lines? Also, could some of the missing data/clocks be due to noise from the leads for the logic analyzer?
Not sure but i don't think so, everything is terminated and buffered everywhere, it is over-engineered in every aspect, i've tested with the clock signal which should be the fastest signal and i got a perfect reading.
- I'd guess the banding would be coming from the analog side, prior to the ADC. Could it be noise from your power supply side?
I guess it was just a loose connection on the CCD pins, after reseating it the problem went away.
As for the power supply it is also over engineered, adding to that, when i recapped i've added newer SEPC ultra low ESR and higher capacity ones on place of the dead ones.
- As far as when you're exposing the image, it looks like you've hooked up all the signals on the front of the winder. What do HGATE, ATN, and /LO get or tell you? HGATE seems like "horizontal gate", like maybe it indicates what's valid image data?
I've made this exact same question to Jim, HGATE goes high whenever the logic gate controlling the CCD clock turns on.
I've also misread /LO, it's actually /LD for Latch Data, it does that, it latches the direction of the data on the signal bus.
and i quote what Jim said to me on the ATN signal "As for ATN signal i know nothing of it."
[/list]
I've previously built a very rough scanning CCD camera (a linear CCD on a breakout, moved by a stepper motor slide, in a cardboard box with a lens stuck in it) and I've seen dark current/dark voltage mentioned as something that represents the output of pixels that truly receive no light, representing the darkest dark you can read. Down the line you'd normalize against that being your "true" black reference. I'd almost expect the ADC to do that for you, given the electronics, but I haven't mapped out the whole schematic.
Very cool project, i've seen a few online some time ago, very cool actually. As for the dark current, i have it a lot of that on my mind right now since i've been re-reading the original source code the whole day and it calls a lot a function called "DARK_ENABLE" and i have no idea what it does, i need to study better that part of the code since i guess it can improve the image quality a lot.
To not upend all your work so far, I wonder if that parallel+I2S bus for the ESP32-CAM interface could help get the data out of the FPGA quickly. Even if you move the PSRAM to the FPGA for a fast buffer, if you're controlling both ends of your own parallel interface after that image data is captured, you could signal when an image is received and the ESP32 could clock the FPGA to read out image data at its own pace, and buffer data to some of its 500+K of internal SRAM while it writes out to an SD card.
I want to get to the part of dealing with the ESP32, i think it has the power of solving completely the saving problem, originally I though on scavenging the PSRAM for the FPGA and using it as its own ram, but when the readout is finished tunnel the pins of the bus to other FPGA pins making it visible to the ESP32 as if the memory was actually soldered on it and just reading it back. but i guess i'll get to that in some days, development once again will start to slow down since i'm on vacation and that ends today, but still i'll keep on working on it on my free which turn out to be quite a lot these days.