Drive strength doesn't really matter very much in analog applications; a few mA gate current is often adequate, maybe a few 10s of mA at full slew rate, which op-amps are more than capable of. The actual gate voltage swing is small, fractional volts, going to maximum when saturated.
When saturated (low Vds, Iout = Vds / Rds(on)), the op-amp attempts to raise Vgs in a vain attempt to maintain output current. In this case, Vgs(on) should be intentionally limited, so that a slow recovery can be minimized, as when load current/voltage goes back up again, it has to drop from Vgs(on) to a bit above Vgs(th).
Individual op-amps are required to maintain balance. In general, Vgs(th) varies between individual parts, so they cannot all be tied to the same gate voltage. Balancing can be enforced by using large source degeneration resistors, at the expense of greatly increasing Rds(on), i.e. saturation voltage at given load current -- typically by a couple volts. If this is acceptable, then yeah, it can be done. A buffer stage might be needed for, say, four or more transistors in parallel in this way, or if higher bandwidth is demanded.
Note that a buffer circuit like a BJT emitter follower and diode, isn't acceptable here, like it is for switching gate drivers. A class A/AB follower is required, generally needing more components (such as bias diodes and complementary emitter followers), or much more bias current (a single emitter follower with load resistor, has to sink (as quiescent current) basically as much current as it can source).
Tim
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