High Speed MOSFET Switching

[azeeman]

Speed is an issue because it makes inductor selection easier. A single MOSFET driven by a transformer is limited to a 50% duty cycle which limits the difference between the input and output voltage. Ideally, the input voltage will range from around 10V to 200V and the output voltage will also range from around 10 to 200V. This requires that the duty cycle go down close to 0%.
I've already built a prototype buck converter with this ability using the double MOSFET technique.

[MariuszD]

I've tested it in a simple buck converter and it works.

You missed the most interesting thing, show us the oscilloscope waveforms. What rise/fall times did you achieve? Is there really no gap between the conduction of the first and second transistors? What are the ringing effects in the gate waveform?

The totem pole is similar in that the transistors are driven out of phase, but requires dead time between switching which complicates the control circuit and also causes voltage spikes.

A circuit with a single transformer does not need dead time.

Also, as the input voltage increases and decreases, the switching frequency has to change to keep from saturating the transformer or a fixed frequency with PWM control is required. This is a problem with a very wide input voltage range as a very high primary inductance is required with a high resolution PWM and very high clock frequency.

DC must be blocked by a capacitor. After the capacitor, the longer the pulse, the lower the voltage. The integral of voltage over time is constant, so the amplitude of induction in the core is also constant.
Changing the frequency is not necessary, the DC restoring circuit is needed at the secondary side. You probably haven't analyzed the operation of the circuit you're writing about.

The LC filter will have a resonant frequency, but the circuit doesn't need to operate at that frequency.

When you are not operating in resonance, the waveforms will be distorted by ringing, and the power drawn from the supply will be higher. Working in resonance can be beneficial.

[mtwieg]

If make before break needs to be guaranteed, a three phase drive can be used.

How so? Show a schematic.

Transformer leakage inductance of a typical pulse transformer is extremely low. A Murata 78604/9C 2:1 transformer has 10mH of primary inductance, leakage inductance of 1.64uH and a 56Vus rating. I don't think that small amount of leakage inductance should cause problems.

1.64uH is pretty high IMO, but it depends on the FET being driven and how much current is required for gate drive. For example, if you're driving the GDT with 10V, then 1.64uH means that the output current takes 164ns for the gate current to reach 1A. Most high side drive ICs are much faster than that.

Also, Murata 78604/9C is not suitable for high voltage applications (datasheet suggests only using it for SELV applications).

[azeeman]

At this point I'm working on a printed circuit board to properly test the circuit. The results on a plugboard are sufficient to show that the idea is workable, but with long wires and jumpers the waveforms are not meaningful.
A three phase generator can be done using a counter but the kicker is that three gate drivers are required which may not be practical.
Thanks for the tip on the transformers, I'll look into that some more. The most important factor is the series inductor. Because of the high voltage, the inductance either has to be large or the frequency high. Also, the frequency can't be too high or the inductor will be self resonant. There's still a lot of work to do. So far I'm happy with the circuit topology, but I want to test it on a PCB to see if there are other issues. Right now I have a circuit which shows a lot of potential, but there may be hidden pitfalls. I've tried other topologies using single MOSFETs and they all had problems handling the wide input and output ranges. The circuit is also very simple and not a lot of effort is required to make a PCB and test it.
There are also other problems to solve such as circuit startup. The input voltage has to be monitored to verify that it is high enough to drive the MOSFET gate and it should also draw as little current as possible. I have a solution, but the final design is dependent on the how well the buck converter works.

[PCB.Wiz]

... There's still a lot of work to do. So far I'm happy with the circuit topology, but I want to test it on a PCB to see if there are other issues. Right now I have a circuit which shows a lot of potential, but there may be hidden pitfalls. I've tried other topologies using single MOSFETs and they all had problems handling the wide input and output ranges. The circuit is also very simple and not a lot of effort is required to make a PCB and test it.
There are also other problems to solve such as circuit startup. The input voltage has to be monitored to verify that it is high enough to drive the MOSFET gate and it should also draw as little current as possible. I have a solution, but the final design is dependent on the how well the buck converter works.

That's quite complex with many large parts like dual transformers and dual power MOSFETS.

Driving a HV MOSFET gate from a transformer like that, is a little hairy.

When you gate the drive off, the transformer + RC will have a somewhat slow decay, meaning a slow gate fall.
You are better to use a single power FET and use a simple gate driver on the HV side, which includes UVLO, so you can always drive the gate properly.

You can still power that from a gated burst transformer if you like, if you want modest ON/OFF rates and isolation.

With a gate driver like you already have, you can make a gated burst oscillator using just the driver and a FB RRC to the inverting IN, for further simplification

[azeeman]

I have working circuits for each of the different parts so I'm familiar with the problems. UVLO as done in gate drivers is not sufficient for solving the low voltage problem because it only checks the control voltage and not the gate drive voltage.
For a previous version I used triacs and a relaxation oscillator driving an optically isolated triac gate driver. A large value resistor connected to the high voltage would charge the relaxation oscillator capacitor and once charged high enough would dump current into the gate driver LED. This would fire the main triacs which would then power up the high voltage and low voltage supplies. From then on the low voltage supply was driven by the high voltage supply.
Triacs are a lot easier to drive then MOSFETs and triacs are immune to undervoltage problems. Also, I want to use a variation of the relaxation oscillator concept for bootstrapping the circuit, but the voltages are a lot different which complicates the circuit.
A simple supply voltage comparator is not the answer because during power up there are three states that the system goes through. In effect, the power circuit is an asynchronous state machine and has to be designed as such. The first state is both reference voltage source and supply voltage source are low. The next state is the reference voltage is correct and the supply voltage is low. The third state is both the reference voltage is correct and the supply voltage is correct.
A fourth state is when the reference voltage is low and the supply voltage is high. This state shouldn't happen in real life.
To determine if the reference voltage is correct, a shunt type reference is used and a transistor is used for current sensing. The reference voltage is considered correct when sufficient current is flowing through it.
The reference voltage is 5V and is used to power the control circuit. A comparator is then used to compare the supply voltage to the reference voltage and when it is high enough, the gate driver circuit is enabled and the buck converter starts and is then used to power the supply circuit.
The above is all powered by a capacitor so the supply voltage will start at 13V and run until the voltage drops down to 10V. This brings in a third bit of information, is the supply voltage 10V?
This is where things get tricky. If the supply voltage is 11V, is it because the capacitor is charging or discharging? This state is ambiguous and another bit of information is required, is the circuit running or stopped? This bit is supplied by an RS flip-flop.
Why not use hysteresis with the supply voltage comparator and eliminate the flip-flop? I tried this on previous circuits and as the input voltage was ramped up, the circuit would oscillate and generally be unstable. This also happened even though Schmitt trigger inverters were used after the comparators. The CMOS chips would go into state where they drew substantial amounts of current.
The reason that this is happening is that the circuit is an asynchronous state machine with two ambiguous states out of four possible states.
The first state when both voltages are zero is stable.
The second state when the reference voltage is correct, but the supply voltage is incorrect. The state is ambiguous because the supply voltage could be incorrect because the capacitor is charging or incorrect because the capacitor is discharging. Even with hysteresis, the comparator output is only a single bit and it cannot convey both voltage direction and value, another bit is required.
The third state is stable, but what happens as the capacitor starts to discharge? The circuit has to remain on until the capacitor discharges to 10V and then turn off. The comparator output can only indicate that the voltage is below 13V.
The flip-flop and an added comparator solves this problem. When the supply voltage reaches 13V, the flip flop is set by one comparator.
When the supply voltage is 10V, the flip flop is reset by a second comparator. Because two comparators are used, four possible states can be distinguished and the ambiguity about both voltage and direction is resolved. The flip flop remembers that supply voltage has peaked which adds another bit of information.
Another problem is how do the various ICs act at low voltage. This has to be determined experimentally or comparators which have UVLO built in can be used. This is also ambiguous because some chips just put their outputs into a high impedance state which is neither high or low. This is sufficient to prevent low voltage turn on but doesn't convey information. A simple solution is to use an open drain type comparator with an output resistor to power.
I'm experimenting with an LM393 which holds its output low at low supply voltages. This has an open collector output which can be used as part of a logic gate. The current sensing transistor is used to provide the output load which acts as an AND gate. When the comparator output is high, the reference voltage is known to be high and the supply voltage is known to be above 13V.
The second LM393 comparator is used to monitor the supply voltage and its output will go low when the supply voltage drops to 11V.
I've attached a schematic to show the circuit topology. The part values are not correct because I still have to determine the buck converter operating values. To do this correctly, I need a circuit board because most of the components will be SMD. I've breadboard parts of the circuit and simulated other parts so I have reasonable confidence that the topology is correct, but only a working circuit will prove this.

[mtwieg]

UVLO as done in gate drivers is not sufficient for solving the low voltage problem because it only checks the control voltage and not the gate drive voltage.

Could you provide some examples of this? All chips I've seen for this purpose have UVLO detection on all supplies, both input and output. This includes the two parts that temperance had referenced in reply #3, NCV51561 and NCV57200.

For a previous version I used triacs...

Triacs and MOSFETs are apples and oranges, I don't see how triacs are relevant here...

Another problem is how do the various ICs act at low voltage. This has to be determined experimentally or comparators which have UVLO built in can be used. This is also ambiguous because some chips just put their outputs into a high impedance state which is neither high or low.

At some point as supply voltage drops near zero, the output(s) must become high impedance. This applies to basically any drive scheme including your own (unless you make something really novel with depletion mode FETs). But this generally isn't a problem in the vast majority of applications, as there's no way for the gates to be pulled high when power is absent. Of course there are some exceptions, but those are.... exceptional.

I've attached a schematic to show the circuit topology.

Again, this is a lot of circuitry to provide functions already present in most ASICs. Even if the gate driver needed a true isolated power supply (not a bootstrap supply), that would be simpler than this circuit. And the actual performance of the switching FETs would certainly be better with an ASIC.

[azeeman]

I've done some more research and found that the MOSFET interleaving technique I'm using has already been discovered which is nice to know. https://dl.acm.org/doi/10.1145/3772326.3774741
I've also found some research on wide input and output range buck converters. https://www.sciencedirect.com/science/article/abs/pii/S1879239125004709
I've also found some research on single bit feedback control which will be used to regulate the buck converters. https://www.sciencedirect.com/science/article/abs/pii/S0947358024002061
Input power sequencing solutions exist, but they assume conditions that don't exist in this project.
https://resources.altium.com/p/what-power-sequencer-ic
https://www.analog.com/en/resources/analog-dialogue/articles/complex-power-supply-sequencing.html
https://www.microchip.com/en-us/about/media-center/blog/2022/why-is-power-sequencing-needed
https://docs.amd.com/r/en-US/xapp1375-power-sequencing/Digital-Sequencing-with-Analog-Devices
From what I've seen, the above solutions are quite complex and based on previous projects and breadboard circuits, simpler solutions exist.
Every solution that I've found assumes that the input supply is fixed and not power constrained. Because the power source will be a capacitor at start up with a very small charging current, the input conditions are a lot different and a different solution is required.
Pulse transformer gate drive circuits exist, https://www.ti.com/lit/an/slla602/slla602.pdf?ts=1776513359966. But they make assumptions that don't apply when dual MOSFETs are used. The duty cycle and frequency will be fixed which eliminates a lot of problems.
Single bit feedback control is also well studied, but the solutions shown are complex.
https://www.sciencedirect.com/science/article/abs/pii/S0947358024002061
The YouTube channel, "The Signal Path" has an excellent demonstration of how single bit feedback is used in analog to digital conversion. , https://youtu.be/z9u-QTDAeaM?t=757
The hardware is extremely simple consisting of a comparator and gated flip-flop. When used as voltage regulator, the output will be taken after the integrator. An integrator is simply a low pass filter and the buck converter inductor and filter capacitor are a good substitute. LC low pass filters are a solved problem. The remaining hardware and calculations are used to extract a numerical value. but these are irrelevant in terms of voltage regulation. What is important is that the circuit is a simple, stable feedback loop which can regulate over a very wide dynamic range with high precision. I don't think it's possible to make the current voltage regulator circuit any simpler. A current regulator circuit will be equally simple.
The capacitor as power supply problem has been solved in one specific case with the triac driver design, but that solution is not extendible to other use cases. The proposed circuit should work better, but this won't be known until a full prototype is built. The individual parts have been tested, but a test of the full circuit under actual operating conditions is required. I believe the logic defining the solution is correct, but whether the circuit as designed correctly implements the logic remains to be seen.
The chips with UVLO capability can only turn on or off at one voltage. They have no capability to turn on at a particular high voltage and then turn off at a particular low voltage. This makes the feature useless for a capacitance based power source. There might be some way to add additional circuitry to take advantage of the UVLO feature, but the chip doesn't export its reference voltage which is required for voltage comparison. The only way to infer whether sufficient voltage is present is by trying to drive the output. This assumes that some other power is available to power up the chip and then test the UVLO.
The point of this project is not to make a commercial product. The end result will be a single board. The point of this project is to raise a number of different questions. Answers are a dime a dozen, especially now that AI is prevalent. Instead, asking the right questions is much harder and much more satisfying.
A good example is Edison's design of the electric dynamo. It was mathematically proven that an electric dynamo could only achieve maximum theoretical efficiency of 50%. This was the correct response to what was thought to be the right question. Edison thought otherwise and asked different questions during his research.
https://www.gutenberg.org/cache/epub/820/pg820-images.html,
Such was the trend of public opinion at the time, but "after Mr. Kruesi had finished the first practical dynamo, and after Mr. Upton had tested it thoroughly and verified his figures and results several times—for he also was surprised—Edison was able to tell the world that he had made a generator giving an efficiency of 90 per cent." Ninety per cent. as against 40 per cent. was a mighty hit, and the world would not believe it. Criticism and argument were again at their height, while Upton, as Edison's duellist, was kept busy replying to private and public challenges of the fact.... "The tremendous progress of the world in the last quarter of a century, owing to the revolution caused by the all-conquering march of 'Heavy Current Engineering,' is the outcome of Edison's work at Menlo Park that raised the efficiency of the dynamo from 40 per cent. to 90 per cent."
Edison never made money on his light bulb because of the constant patent fights. Instead, he made improvements to the telephone, concrete, batteries and numerous other everyday items. He also discovered wireless transmission before Hertz, but didn't understand what he had discovered. Hertz knew what questions to ask and had the mathematical ability to explain his findings. Edison happily conceded the discovery to Hertz mainly because of Hertz's better understanding.
Edison's assertions were treated with scepticism by the scientific world, which was not then ready for the discovery and not sufficiently furnished with corroborative data. It is singular, to say the least, to note how Edison's experiments paralleled and proved in advance those that came later; and even his apparatus such as the "dark box" for making the tiny sparks visible (as the waves impinged on the receiver) bears close analogy with similar apparatus employed by Hertz. Indeed, as Edison sent the dark-box apparatus to the Paris Exposition in 1881, and let Batchelor repeat there the puzzling experiments, it seems by no means unlikely that, either directly or on the report of some friend, Hertz may thus have received from Edison a most valuable suggestion, the inventor aiding the physicist in opening up a wonderful new realm. In this connection, indeed, it is very interesting to quote two great authorities. In May, 1889, at a meeting of the Institution of Electrical Engineers in London, Dr. (now Sir) Oliver Lodge remarked in a discussion on a paper of his own on lightning conductors, embracing the Hertzian waves in its treatment: "Many of the effects I have shown—sparks in unsuspected places and other things—have been observed before. Henry observed things of the kind and Edison noticed some curious phenomena, and said it was not electricity but 'etheric force' that caused these sparks; and the matter was rather pooh-poohed. It was a small part of THIS VERY THING; only the time was not ripe; theoretical knowledge was not ready for it." Again in his "Signalling without Wires," in giving the history of the coherer principle, Lodge remarks: "Sparks identical in all respects with those discovered by Hertz had been seen in recent times both by Edison and by Sylvanus Thompson, being styled 'etheric force' by the former; but their theoretic significance had not been perceived, and they were somewhat sceptically regarded."

The open question is how to make a MOSFET gate drive circuit which uses a capacitor based power supply with the least amount of power consumption both during start up and while running.
This may even be the wrong question.
There may be a different type of solution base on different operating principles. The obvious one is to use a current limiter and shunt regulator to drive the control circuit directly. This might be better, but the required operating current must be known in advance. With the capacitor power supply, there's a tradeoff between time and current. A low current and long startup time keeps static power consumption down, but dynamic power consumption caused by the high frequency gate drive may be problematic.
The only way to find out is to build the circuit and try out the different ideas.

[temperance]

I've done some more research and found that the MOSFET interleaving technique I'm using has already been discovered which is nice to know. https://dl.acm.org/doi/10.1145/3772326.3774741

That is an interleaved buck converter. The idea you've shown is a PWM based method to achieve almost 100 % duty while the driver is a transformer coupled MOSFET driver, driving two parallel MOSFET's out of phase (which is actually a good idea.). Or did I misunderstand something.

I've also found some research on wide input and output range buck converters.

What I think you are after is called hysteretic control.

[azeeman]

Thanks, l misread it. It looks like the only solution is to built the circuit and test it. That's going to take some time.

[azeeman]

Hysteretic control goes between two fixed voltages which limits the precision to the difference between the two setpoints. Single bit control can have arbitrarily low precision down to the nanovolts if desired. It depends only on the comparator gain. If two comparators are put in series, the gain can be in the billions which implies sensitivity down to the nanovolts. I've built circuits using this technique and they work great.
In practice, because the comparator output is gated there will be hysteresis simply because the inductor will continue to discharge into the capacitor or the capacitor will discharge into the load when the comparator output is not being sampled.
Ideally, the comparator speed will be extremely high to reduce hysteresis, but then the switching element frequency is also constrained. For systems where the voltage is stable such as in analog to digital converters, comparator speed is not an issue and gain sets the ultimate resolution. This is easily shown with a PC sound card by capturing some audio and then looking at the data where the resolution can be in the microvolt range.
I've built single bit detectors to measure very low voltages using a DAC followed by a voltage divider and an op-amp. A 12 bit DAC with a 5V reference can be divided down to a 20 mV range giving resolution of 20mV / 4096 = 4.9 uV. A microcontroller is used to control the DAC and monitor the output of the op-amp or comparator. If the output is high, the DAC setting is decreased, if the output is low, the DAC setting is increased. Average over multiple DAC readings and the offset can be measured down to the microvolt range.
If a lot of measurements are averaged, the effective resolution can be increased. https://www.silabs.com/documents/public/application-notes/an118.pdf
I've played around a lot with using the sound card as a precision AC voltmeter and the performance is amazing. Accuracy is probably in the 12 to 14 bit range, but the dynamic range is incredible.
Microphone input voltages can be in the microvolt range and the sound card will have a 'Boost' amplifier to increase the microphone input. My testing has shown that the boost is implemented in software along with all the other volume controls. The analog to digital converter works from microvolts to about 3V. It has an internal band gap reference and the frequency response is almost dead flat.
One of the goals of the power supply project is to do research on inductor saturation measurement. My idea is to use the sound card to generate a test signal in one winding around a ferrite with a current source driving another winding. A third winding will go to the sound card line in input and an FFT is done to measure the ratio between the fundamental harmonic and the other harmonics as the DC current changes. When the inductor saturates, the waveform distortion should increase and it should be possible to determine the amount of saturation.
This kind of testing is surprisingly easy using Python and Numpy although dealing with the sound card is a bit of a pain.Every PC has a different setup and a universal solution is difficult. Cheap external sound cards are available and they would be the base for different types of test equipment.
Once understood, FFTs are very easy to use and make AC measurements extremely easy to do. This is the wrong forum for this topic, but if there is interest I can share my findings and software.

[KrudyZ]

I've done some more research and found that the MOSFET interleaving technique I'm using has already been discovered which is nice to know. https://dl.acm.org/doi/10.1145/3772326.3774741

That is an interleaved buck converter. The idea you've shown is a PWM based method to achieve almost 100 % duty while the driver is a transformer coupled MOSFET driver, driving two parallel MOSFET's out of phase (which is actually a good idea.). Or did I misunderstand something.

We haven't seen any scope traces and I think there is a reason for that.
As drawn the two transistors are not actually out of phase, since both the primary and secondary of the transformers are swapped, so you would still turn on both transistors at the same time.
However, assuming that the intention was that they would be 180 degrees out of phase there is still no clean modulation capability with a single drive signal.
If you stopped the 50% duty cycle drive train, the gate voltage on the currently turned on transistor would decay and go through the linear region rather slowly and start generating heat on every modulation transition. There simply isn't anything in this design that would hard turn off a transistors other than the carrier, which would then turn on the other one.

[azeeman]

A pulse transformer consists of a very tiny toroid or other ferrite with a few turns of wire. The pulse they generate is formed more by the transformer than the driving circuit because they cannot store that much energy. In my prototype I'm using a pulse transformer with a 56Vus rating. This means that it will saturate in 5.6us if 10V is put on the primary. After the transformer saturates, the secondary voltage collapses and the MOSFET will turn off. The only thing that can sustain current is the leakage inductance which is much smaller than the primary inductance. Also, once the transformer has saturated, the magnetics are effectively all air core and the permeability goes way down.
The high frequency drive is necessary only because the transformer can keep the MOSFET on for a few microseconds at best. The reason I'm so excited about the circuit is that I can keep a pair of MOSFETs on for a virtually unlimited amount of time while using very small pulse transformers. For example, assume the input is 200V, the inductor is 10mH and the on time is 5us. The peak inductor current will be 200V* 5us / 10mH = 100mA.
Now assume the input voltage is 10V, the on time is still 5us and the inductor is the same. The peak current is now 10V * 5us / 10mH = 5ma. To get the same current at 200V with a 10V input, the MOSFET has to be kept on for 100us which might be possible with a pulse transformer, but the primary inductance has to be huge with correspondingly high leakage current and lots of ringing and other artifacts. The only practical way to keep the MOSFET on for that length of time is to use a DC gate drive which is not a problem except for supplying power to the gate drive.
High side drive is preferred because it makes output voltage and current monitoring much easier. Also, the chosen buck converter topology with high side drive doesn't generate the high voltages associated with other low side drive topologies like a flyback converter.
Scope waveforms are useless at this time because the problem is not the gate drive waveform. As the name implies, pulse transformers are optimized for making pulses and the goal of the project is not to find the ideal pulse transformer, that's a solved problem. Instead, the problem is keeping a switch on for decent length of time during initial bootstrap and also being able to turn it on for a very short time when the input voltage is high. That's also a solved problem other than finding a suitable inductor to limit the current with a high voltage across it.
As shown above, a 10mH inductor will give a peak current of 100ma for a 5us on time.
The problem is that commercially available 10mH inductors that can handle 100ma of DC current have self resonant frequencies that are close to the 100kHz switching frequency. It's better to use a 1Mhz switching frequency with a much smaller inductor and pulse transformer. The smaller inductances will reduce ringing and make driving the MOSFET much easier. Because the MOSFETS will always be driven with the same frequency and duty cycle regardless of the input voltage, the wide input range problem is effectively solved.
The only downside with high frequency gate drive is gate current. The MOSFET I'm using as an example has a typical gate charge of 6.8nC so if driven at 1MHz, the gate current will be 6.8mA.
Under normal conditions this is not that high, but with a 200V input to the circuit, the power consumption will be 1.36W which for the intended application is relatively high.
By using a capacitor to charge using a very low current and then using the capacitor as a power supply just long enough to get a switcher going to self power itself, the static power dissipation caused by the capacitor charge current will be very low while the dynamic power dissipation caused by the gate drive will also be very low because is done at 10V. The power is only 68mW.
The tradeoff is the time required to charge the capacitor which should be reasonably low.

[temperance]

From your original post:

The problem is that a 1:2 primary to secondary ratio is required because the peak to peak gate drive signal has to be twice the MOSFET on voltage and gate drivers rated to 20V are scarce.

Why is that? MOSFET gates should not be driven close to 20 V because that is their maximum rating. But what is this "MOSFET on voltage"? In a switching application, the MOSFET is either of or in saturation. To achieve that, you need maximum V_gsth + a couple of volts.

[azeeman]

Peak to peak voltage needs to be 20V to give a 10V peak gate drive. The gate drive is AC coupled with a 50% duty cycle. Incidentally, this also gives an almost ideal gate drive signal because the fastest voltage change is around 0V. The gate is driven on hard and driven off hard.

[temperance]

This is probably where the transformer gate drive is going to fail if you want to modulate the duty ratio while you don't have a DC restore circuit on the secondary side.

[azeeman]

The whole point is not to modulate the gate duty cycle precisely because it is doomed to fail. Instead, it is kept at a constant 50% duty cycle and constant frequency. Because the frequency is so high, the switch pair of MOSFETs is turned on and off at a much slower rate. This done by using flip-flop and NAND gate. The flip-flop is clocked at 2MHz or so to give a 1MHz gate frequency while the modulating signal can vary from a minimum of 2us to always on or off.
The MOSFETs themselves are either turned on and off at 1MHz so that the switch is effectively 100% on or the MOSFETs are not driven at all so the switch is effectively 100% off. This gives all the benefits of having simple high speed MOSFET gating while allowing the use of much slower PWM or other type of control over an extremely wide duty cycle range.

[KrudyZ]

...the modulating signal can vary from a minimum of 2us to always on or off.
The MOSFETs themselves are either turned on and off at 1MHz so that the switch is effectively 100% on or the MOSFETs are not driven at all so the switch is effectively 100% off. This gives all the benefits of having simple high speed MOSFET gating while allowing the use of much slower PWM or other type of control over an extremely wide duty cycle range.

There will be a minimum gate turn off time after you stop driving the primary. So your minimum of 2us cannot actually happen since your transformer won't have saturated yet. There appears to be a bit of a race going on with the RC coupling of the gate driver and the transformer saturating. I would expect there to be some ringing whenever you stop the 1 MHz pulse train. Even after the pulse transformer saturates, forming a low impedance path for the gate to discharge, the gate wants to turn back on due to the Miller capacitance and the buck regulator driving the source down. The gate discharging will then counter the flux in the core driving it back out of saturation, which would really increase the time to turn off the FET.
I don't think you will be able to get close to a 2us on or off time for the buck and would be worried that the turn off will be lossy.

In any case I'm looking forward to seeing your scope traces once you have a board that you feel is representative.

[azeeman]

Inductor time constant is L/R because of the circulating current. The lower the resistor, the longer it takes for the current to drop to zero. You're correct that turning the MOSFET off when the drive turns off will increase the turn off time if there is a circulating current. There is a circulating current on the secondary, but the primary current path is open and a voltage spike will occur there which will dissipate some of the energy. The leakage inductance will also participate but is quite small.
I can just connect an Arduino to the pulse transformer and drive it with a square wave, but the transformer I'm using is just what I have laying around and may not be representative. It's being driven on the center tap also which is not the way it should be driven.
I'm somewhat surprised at all the attention paid to details of the gate drive and turning the MOSFET off. I was breaking my head coming up with ways to keep the MOSFET on and paid zero attention to turning it off. One trick to keeping it on is to use a diode to trap charge on the gate and then use a second pulse transformer to drive a second MOSFET to discharge the gate. This will work, but adds a lot of complexity to the control circuit. There's also the problem of putting essentially a DC current into the transformer which may cause saturation problems.
AC drive kept going through my head because the gate is just a capacitor. Miller effect is a problem as well as other problems but it's still mostly capacitive. For a really great video on this check out Ben-Yaakov's YouTube channel. https://www.youtube.com/watch?v=of_v2N5f788. When it comes to switching power supplies, he's the go to guy.
Once AC drive is accepted, then the problem is that the on time is fixed and the MOSFET must turn off. But what if while one is going off, another  in parallel is going on? Bingo, problem solved. Just send bursts of pulses, easy peasy, the rest is details. I'm no expert on driving MOSFETs, but as the above video show's there's no lack of expertise available and I don't want to waste precious time and bandwidth with my explanations when there's far better ones elsewhere.
My main goal is to get the idea of using AC drive with two parallel MOSFETs to get extreme duty cycles. I can't complain about the all comments on the gate drive, I really appreciate that people take the time to effectively peer review my ideas and offer suggestions.

[azeeman]

Here is a reference circuit that I'm using to determine operating parameters and component values. I've also attached the design assumptions and formulas. A good reference on using pulse transformers as MOSFET gate drivers is available at https://www.ti.com/lit/an/slla602/slla602.pdf?ts=1776960671812&ref_url=https%253A%252F%252Fwww.google.com%252F
MOSFET driving in general is covered here:
 https://www.ti.com/lit/ml/slua618a/slua618a.pdf
I've looked into using a floating power supply for supplying gate drive voltage, but readily available supplies are large and grossly overrated for gate driving.
The pulse transformer specifications can be found here. https://yageogroup.com/content/datasheet/asset/file/DATASHEET_924
The main problem with using a pulse transformer to drive a MOSFET is keeping the MOSFET on for even very short periods of time while having fast turn on and turn off times. A pulse transformer is inherently a high frequency device which as the name implies, puts out a short pulse when DC is applied to the primary.
The pulse is formed either by the primary current being switched on and off, or by transformer saturation. The inability to maintain a wide pulse is actually an asset in that it becomes impossible to keep the MOSFET gate voltage at an intermediate value for any length of time. With the specified pulse transformer, the maximum MOSFET on time is 3us, this reduces the chance of damaging the MOSFET by applying a low gate voltage for extended periods of time.
MOSFETs with voltage ratings of 700V and 10A drain current cost around $1.44 each and the circuit will easily drive these. This is the main impetus for this design. Adding a second cheap MOSFET is easier to deal with than more complicated circuits usually requiring some kind of microcontroller or dedicated chip as well as protection against improper gate drive.
The application I intend to use this circuit for is inherently energy limited as it is intended for controlling a self powered elliptical. By using grossly overrated MOSFETs, the need for inductors in a buck type converter is eliminated as the human powered generator itself limits available energy. Instead, much larger filter capacitance is required to absorb large current spikes with minimal voltage ripple. Large capacitors are much easier to source and much cheaper than inductors for the same energy handling capability.
The control circuit also becomes very simple because a simple comparator can be used to turn the MOSFET based switch on and off. No PWM controller is required for either voltage or current control.
This is a one off project and I'm sure more refined and cheaper solutions are possible, but it does demonstrate another possible solution which as far as I know, hasn't been tried yet.
The transformers should only have one ground connection on the primary. The schematic has been replaced.

[azeeman]

I've attached the gate drive waveforms and design calculations. The pulse transformers are part number PMT9085.011NLT from Pulse Electronics, https://yageogroup.com/content/datasheet/asset/file/DATASHEET_924 and the MOSFET is from Good Ark Semiconductor, part number SSFU6511, https://goodarksemi.com/docs/datasheets/mosfets/SSFU6511.pdf.
The transformer, gate drive frequency and MOSFET total gate charge have to considered as a whole. The transformer is limited in the amount of energy it can transfer to the gate which limits the minimum gate frequency.
For very low gate frequencies, the Volt-second rating needs to be quite high and pulse transformers with the required rating become both rare and expensive. It's better to have a high gate frequency with two MOSFETs and then modulate the gate frequency at a lower rate.
Also, if the gate capacitance is relatively low, the resonant frequency of the gate capacitance and the transformer inductance may be higher than the gate frequency causing significant ringing. I found this out when I used MOSFETs with much lower total gate charge on the breadboard circuit. This is easily solved by using a transformer with a lower primary inductance and increasing the gate frequency to match.
With a smaller total gate charge, the energy transfer required is also lower allowing the use of a smaller transformer with lower Volt-second rating and primary inductance. This will require a higher gate frequency because the gate drive voltage will still be the same so the on time has to be reduced to compensate.
MOSFETs rated for low drain voltage tend to have much lower gate charge than high voltage MOSFETS. The MOSFETs used initially were rated for 60V, while the above MOSFETs are rated to 650V.

[KrudyZ]

Have you considered the alternative of using frequency modulation to carry the on / off information?

Let's say you define the ON state as a 2MHz 50% duty cycle drive signal and the OFF as a 1 MHZ 50% duty cycle.
You drive this through your pulse transformer and rectify the output to give you an isolated DC supply.
You then create a circuit that can discriminate between the 1MHz and 2MHz signals and use that to drive the gate.

In this scheme you would only need a single pulse transformer and MOSFET, the two parts you save are likely larger and more expensive than the rectifier and demodulation logic.
You also get very clean on / off gate transitions as you are no longer relying on decay behavior.

[azeeman]

The current gate drive is nearly ideal as it drives the gate both maximum positive and negative. The maximum voltage rate of change occurs at zero volts.
I've seen circuits where one pulse transformer is used to put charge on the gate and a second to drive a transistor to discharge the gate. The low gate leakage means that the MOSFET can stay on for a significant amount of time. This adds complexity to the control circuitry because of the need to control timing. My intention is to use single bit control where a comparator is used to turn the switch on and off. A DAC puts a setpoint voltage on input of the comparator and a voltage divider across the output drives the other input. When the output voltage is low, the MOSFETs are turned on. When the output voltage is high, the MOSFETS turn off. A second comparator can be used to monitor the current and also turn off the MOSFETs if the current is too high. Simple logic can be used to create a power supply with both current and voltage control.
The MOSFET is cheaper than the pulse transformers used to drive it. Even very high power MOSFETs are now ridiculously cheap. The gate drive requirements are almost the same for both small signal and high power MOSFETs. With relatively simple gate drive it should make other applications easier. One example would be a class D audio amplifier using just a comparator to match the input and output voltages. Two identical switches would be used, one to drive the output high and one to drive it low. A bit of logic is required to prevent both switches turning on at the same time with an LC filter at the output.
Of course, class D audio amplifiers on a chip are readily available, but I'm more interested in finding the simplest possible solution other than throwing millions of transistors at the problem.

[jnk0le]

Nоԝ уоur АС соuрӏіոɡ іѕ іո tһе ԝrоոɡ рӏасе, ոоt tо mеոtіоո ӏасk оf ɡаtе ԁrіvе rеѕіѕtоrѕ.

Wһу ԁоеѕ іt ӏооk ӏіkе АІ ѕӏор?

[temperance]

The outputs of MOSFET drivers with multiple outputs for the same input should NOT be connected together unless otherwise stated in their data sheets. Doing so leads to enormous cross conduction in the driver output stage.