Electronics > Projects, Designs, and Technical Stuff
Home Brew Analog Computer System
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peter.mcnair:

--- Quote from: GK on February 02, 2015, 07:33:18 am ---Just out of curiosity, have you tried to derive an electrical analogue for any of the systems from Sprott's book represented by the equations in jerk form (chapter 3.5)? He has a few example circuits in chapter 10, but this isn't something I've started at yet.

--- End quote ---

I've only done his JD5 (attached) and JD2...I will have a crack at his 'chaotic memory oscillators' - Table 3.3 - especially now I can do sinh(x) and the like - albeit digitally  ;)
krivx:
Off-topic, but how did you machine that case to have all those holes in such a neat grid? My efforts would be much sloppier...
Ebivetar:
Really amazing project. I have one book similar to this stuff, Analog&Digital simulations or something.

Can OP tell me what is the difference between using Analog computer and Matlab+Simulink?
Will this computer simulate the system faster and maybe with higher precision?
I am also interested how do you measure the processing speed/power of analog computer?

If you can please recommend me some books regarding this.
GK:
The adhesive washers were cut to size with the mounting hole punched and sold specifically as transistor thermal mounting pads. Whatever they are they are cwap. I wouldn't even like to use them for transistors mounted with spring clamps. The issue is moot now anyway as I have a 100 pack of mica pads on the way.

See replies #196 and #198 in this thread for details of the panel drilling method.

Without delving in deep it's rather a bit difficult to make any truly meaningful comparisons between the processing power of an analog computer versus a digital computer, although I can say from first hand experience that an analog computer can plot a chaotic attractor waaaaayyyyyyyyy quicker than my 32k, BBC Model B computer can.  ;D

Ancient analog computing books that I've tracked down on Abebooks listed here:

http://www.glensstuff.com/analogbookshelf/analogbookshelf.htm
 
GK:
Just finished the patchable Summing Amplifier design and am about to send off the PCB files for manufacture. 20 of these are going to be made.
The design uses a variation of "chopper" stabilization to achieve a sub 100uV input offset error. In lieu of a mechanical chopper and high gain demodulator amplifier, I've used a modern "auto-zeroing" op-amp (AD8538) for the DC path. However the basic principle of operation is exactly the same as the old school approach, of which I have attached an example (taken from Electronic Analog and Hybrid Computers, Korn & Korn, chapter 4).

The amplifier is unity gain stable and has a GBWP a little under 2 MHz. Slew rate is 13V/us for a full "power" (or rather amplitude - 200 Vp-p) bandwidth of 20 kHz.
Simplifying by neglecting the effects of U1's Ib (15 pA typical) drawn from the summing junction and U1's Vos (5 uV typical) the net input offset error of the discrete HV op-amp is reduced by a factor of 1010 (61dB), which is equal to the DC gain of the stabilization path. The RC networks introduce a number of poles and zeros that work together to frequency compensate the stabilization path, giving it a continuous dominant pole roll-off throughout the effective operating frequency range. The DC stabilization path reaches unity gain at 140 Hz. At this frequency point the discrete HV op-amp open loop gain has only just begun itself to integrate and accumulate phase due to the dominant-pole Miller compensation, so the combined whole control loop sub 140 Hz never even reaches conditional stability (not that it would be much of a concern if it did).

Open loop gain at DC is obviously huge; being the sum of all stages. The only down side of this stabilization scheme (and all those that operate on the same principle) is that clipping must be avoided. If the amplifier output is "saturated", or slammed up against a rail, the high gain stabilization path goes open loop and itself rails out. Due to the long time constants involved, it takes the circuit a while to reach equilibrium again once the over-driving input signal is either removed or reduced in amplitude. However since I don't have to filter out 50/60Hz demodulation ripple to sub mV levels, by stabilizer time constant is orders of magnitude shorter than what the mechanical chopper guys had to live with back in the tube days.

The frequency compensation/equalization capacitors across the high-value feedback network resistors are mandatory for stability. The amplifier would never be stable at a GBWP of nearly 2 MHz with an un-bypassed 500k feedback resistor. For example 500k would corner with just 5pF of input capacitance at less than 70 kHz. The 15 pF bypass capacitance solves this problem not only by counteracting the LF pole that would otherwise be formed by the 500 k  feedback resistor and the amplifiers effective input capacitance, but by providing a healthy amount of phase-lead compensation to boot. Of course 15pF otherwise corners with 500k at only ~21 kHz, so in order to maintain the amplifiers full closed loop small signal bandwidth the equalization capacitors are added to the input resistors.





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