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How much stray capacitance in this?
alank2:
I had planned on using a 12pF RTC crystal, but the datasheet says it is optimized for 6pF crystals. It is MCP7940N. It mentions that CL=(CX1*CX2)/(CX1+CX2)+Cstray, but I'm not sure how to calculate the stray capacitance. I saw some estimates online of 3-8 pF. I've attached a picture of the layout, it has its own ground pour top/bottom layer, but both the traces to the crystal are pretty short 0.2" or 0.3" ish.
bob91343:
You can't calculate stray capacitance. You can estimate it based on experience; about 1 or 2 pF per inch of twisted pair wire, for instance.
Having said that, most crystal frequencies I have measured are painfully inaccurate. Further, they are riddled with spurious responses.
I put a signal generator signal into a counter and oscilloscope with a crystal between (either series or parallel) and carefully vary the frequency to get a null or peak. Results usually are disappointing.
I fail to understand why crystals are usually specified at parallel resonance with a specified capacitance in parallel. It seem that a better characterization would be to use series resonance, as that isn't controlled by strays.
alank2:
How important is a top pour? Can you do a crystal layout with just a bottom pour that is its own separate thing? If that is workable, then do you just connect the two bottom pours (crystal, main) together at one small point?
bob91343:
There is no simple answer. You must evaluate the paths and see where the signal goes and make sure it only goes where you want.
temperance:
A requirement is to minimize stray capacitance between the input and the output of the oscillator. A better solution which is also easier to implement is a guard ring.
You can see how this is being done on page 46 in the following app note:
https://www.st.com/resource/en/application_note/cd00221665-oscillator-design-guide-for-stm8af-al-s-stm32-mcus-and-mpus-stmicroelectronics.pdf
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