The Motorola/On application notes linked earlier show a different configuration where a capacitor placed in parallel with the zener diode provides low AC impedance and the dynamic performance only relies on a forward biased rectifier diode. Then the turn-on time and dynamic impedance of the zener diode are much less important.
I know you gave the frequency but it would have been helpful to have your drawn graph of the waveform include time.
You are reverse biassing the b-e junction. This will "poison" the transistor over time and trap electrons in the junction. The gain will collapse and the transistor will die. this process is irreversible ( unless you cook the transistor at high temperatures ( like 200 degrees + ) to knock the trapped electrons loose.
"Hot carriers" will cause dislocations in the silicon lattice which act as recombination points lowering minority carrier lifetime and hfe. This is a major problem for high gain transistors but of little consequence for power transistors and gold doped transistors which operate at low hfe anyway.
The beta degradation mechanism has nothing to do with dislocations. It is a surface effect at the SiO
2-Si interface between the base and emitter. It is called
McDonald Effect after the guy who first described it.
Hot carriers due to the reverse bias of the base-emitter junction get enough energy to occupy traps at the SiO
2-Si interface. The charge that is then stored in the traps at the interface bends the bands at the interface and changes the relative energy level of the traps and they become recombination/generation centers that both allow conduction in the Si at the interface. This provides a path for current from base to emitter that bypasses the active area of the transistor.
What McDonald did to show this was the mechanism was add at gate electrode over the junction that allowed him to modulate the surface conduction with applied bias.
The rate at which the degradation occurs is exponentially dependent on the applied reverse bias and the construction of the transistor.
Degradation shows up first at low forward current current levels (~nA) but grows with time and shows up at higher levels as the current through the leakage path increases.
The reverse bias at which it occurs depends on the construction of the transistor. In high frequency Si BJTs and SiGe HBTs it can be as low as 3.5V and much less than the breakdown. In low frequency power devices it can be higher. However it always starts before the base-emitter junction goes into hard breakdown.
In this case the specified breakdown or "maximum reverse bias limit" of the device
theleakydiode is using is specified at 9V, which is very high. I suspect if he limited the reverse voltage to 7.5-8V there would be no issue.