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10bit paralel ADC and convert the binary into 3 BCD digits. 10bit is the closest I can get to get the full 999 range of 3 digits (that is 25 less than what 10 bit limit is)
This all sounds fun and easy and no....I am not using an arduino or FPGA or anything like that. I am a analog nerd fighting with audio stuff a lot and analog stuff in general, and I hav absolutely no interest in copying something from the internet that I wont understand at all.
SO the real problem is conversion of 10bit binary to BCD. I have found a IC (74184 and like that) which are long obsolete and unobtanium, so I guess a built up converter it is. I just dont know how at al. If anyone could somehow point me to something expandeable or draw up somethin for me with logic gates or TTLs or CMOS I would be gratefull. And please also keep in mind that I am a total noob when dealing with digital tech. Even the basic digital tech.
Thanks.
BBM.
I appreciate the OP not wanting to hear a "just use a microcontroller/FPGA/CPLD" answer but doing this using just an ADC and discrete logic ICs isn't very practical. It is
doable but would likely take 10 to 15 ICs to do. Using a microcontroller, you can likely do it with just two ICs--the MCU and a precision voltage reference IC.
There is already a
project on github that uses a MCU to emulate the CA3162. (I'm guessing you have already come across it.) And, no, even though that is an Arduino sketch, you wouldn't have to use an entire Arduino board to do what you need to do. You could do the early development using an Arduino and then once you are happy with the firmware you could design your own circuit using just a MCU, a voltage reference, and a handful of passives.
Just to get an idea of what it would take to do this using discrete logic ICs, watch
this YouTube video (for an 8-bit binary to BCD converter) and recognize that each of those C1, C2 .. Cx blocks would need to be separate discrete logic circuits. You would need even more since you are converting a 10-bit value. Note that the circuit shown is just the combinational logic part. You would still need sequential logic to buffer the output, synchronize with the the ADC, multiplex the output, etc.
You could cheat a little and use EEPROMs as a look-up table for the combinational logic. This would reduce the number of required components but at that point you may as well just use a CPLD or FPGA.