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How to calculate Vce in between cascode BJT's

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In a circuit like below where the bottom of the current mirror meets the diff-pair, and you have Q2 over Q4, 1 Vce over another Vce, I can find the current , and guess the BJT's are in active mode with reverse based CB, but what calculation gives the number for Vce? What have I missed or don't remember , maybe it's in the Eber's Moll type models? How do you calculate the base voltage of Q5 then ??? I could set the output voltage/I and work back, and then that set's the Vce ? But otherwise how do u do it ?? I don't know the BJT semi-conductor details much yet.

I was skimming through cascode amp's, current mirrors and other multi transistor amps, and I never saw the answer in there either. Calling a BJT a voltage controlled current source, I know the BJT is happy with a range of Vce voltages (for each operating region)

Being a diff amp, I could see it setting Q5's current to about the same IB as the Q2's IB. But in a pure cascode, what set's that voltage in between Q2/4 ??

It's not a cascode, but a differential pair and current mirror.

Normally you have negative feedback, so the output voltage stabilizes at 0V. The inputs are connected to 0V, so the output will be unpredictable and dependent on the mismatch between the transistors. Try connecting Q3's base to the output, to close the loop.

The voltages on Q3 and Q4's collectors are roughly a diode drop below the positive supply voltage, which is to be expected.

Two collectors facing, is an undefined condition: two currents fighting it out.  The voltage gain is extremely high (limited by Early effect).  The voltage either must be stabilized by feedback, or by dumping into a load impedance; or letting one or the other saturate (perhaps for a comparator instead?), but saturation is undesirable as it severely reduces hFE, the worst case being for Q4, thus drawing tail current (in part or whole) through the input pin.

Here, the load impedance is Q5 Vbe.  So the collector voltages are mostly irrelevant, a diode drop as said above, and what's being controlled (well, when the diff inputs aren't shorted together, obviously) is a subtraction of currents and thus the difference in currents (the diff amp output as such) goes into Q5 Ib.  And as long as its hFE is quite large, this again gives very high gain, and so needs feedback stabilization yadda yadda, and you get the usual op-amp situation that's familiar. :-+


Yep, node voltage tends to be determined by the lowest impedance present on the node, which is Q5 base here.

This assumes good pairwise matching of transistors and Ic(Q4) > Ic(Q2), as it should be considering the current mirror and its base currents.
If Ic(Q2) > Ic(Q4) then their collectors will be pinned to the positive rail ;)
And, technically, Ic(Q2)=Ic(Q4) in such case, something somethnig Kirhoff somethnig.

Ok so like a good current source the Vce will still be set by the external conditions. With the base of Q5 disconnected, Ltspice says about 3.8V was there, so what does that number mean? What u might expect if u put a DMM there ?

In this example, if Q1 Ic + 2Ib are entering Q3's collector, is it ok to say that if 2Ib was the base current of Q5, then the diff pair would both have the same current Ic+2Ib, and in the sim Q5's current is about 2x Ib 1. Then I could get a Vbe.

Last year I would have tried a matrix eqn but they usually go nowhere when there's Vce's everywhere, or I'm doing it wrong.


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