Pass PWM but block steady DC

[JoeyG]

I looking for circuit suggestions at 5V Logic, that can pass a PWM signal and block  Vdd steady signal   up to about 20KHz.

THe PWM would be 0 to 95%    I'm thinking something with an XOR gate and and  RC time constant to set the period when the signal stays high too long.

When the time is too long on logic high (not PWM)  the should be logic zero.

[tooki]

Perhaps something using a retriggerable monostable multivibrator, but triggered on a low pulse rather than a high one?

That would catch very small low pulses, so that even e.g. 99.9% duty cycle wouldn’t be detected as DC. On the other hand, if it makes sense in your application for almost 100% to count as 100%, you could also consider some kind of filtering to analog, and use a comparator.

[Marco]

I think your description is too poor.

Is it just a PWM signal riding on Vdd? If so just level shift.

Should a long high input signal be regarded as idle and pull the output low? RC filter it with a bypass diode across the resistor so low level is immediately passed, invert it and combine it with the input with an AND gate. (Though I question the sanity of the application.)

[wasedadoc]

PWM contains AC and DC. A capacitor can pass AC and block DC. The DC in PWM can be easily reconstituted after the capacitor.

[PCB.Wiz]

THe PWM would be 0 to 95%    I'm thinking something with an XOR gate and and  RC time constant to set the period when the signal stays high too long.

When the time is too long on logic high (not PWM)  the should be logic zero.

#1 is a good start.
You need a retriggerable monostable for the time window, but it will signal at both 0% and 100%
If you want 0% ( or 100% ?)  to do something else, you need more logic, and a better description 

An AND gate can combine pwm with mono.q to force 0 on static hi.

[Marco]

Oops, I guess XOR works, but you still need to bypass the resistor with a diode to get it to work instantly when input goes low.