Author Topic: How to design a simple one-quadrant voltage follower with little dropout?  (Read 811 times)

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Offline technixTopic starter

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I have been designing a few debug adapters that samples target voltage for its own output buffers. However until now all designs powers the output side of the level converters using power from the target.

I would like to avoid loading target power rail in my next designs, which means instead of powering the buffers directly I need a tracking regulator that uses target voltage only as a reference, while draw energy from the programmer’s own power source (usually USB.)

For this tracking regulator, I need as little voltage drop as possible, especially for ones intended to work with a 5V target voltage (for example DAP405 high-speed CMSIS-DAP, which allows debugging of 5V microcontrollers.) What do I need beyond an RRIO op-amp? What topology do I need?

The output buffers can be standard logic like 74LVC164245 or 74AVC4T774, or output banks on some PLD like XC2C32A or XC6SLX9.
« Last Edit: September 18, 2019, 09:12:16 am by technix »
 

Offline dom0

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Re: How to design a simple one-quadrant voltage follower with little dropout?
« Reply #1 on: September 18, 2019, 11:34:14 am »
Op amp voltage follower, possibly with an external NPN emitter follower, if you need more than typical op amps can supply (~5-10 mA for single supply, low voltage op amps).
,
 

Offline technixTopic starter

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Re: How to design a simple one-quadrant voltage follower with little dropout?
« Reply #2 on: September 18, 2019, 11:43:59 am »
Op amp voltage follower, possibly with an external NPN emitter follower, if you need more than typical op amps can supply (~5-10 mA for single supply, low voltage op amps).
There is still at least one diode drop for NPN emitter follower. Is there anything that can do next to no drop?
 

Offline dom0

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Re: How to design a simple one-quadrant voltage follower with little dropout?
« Reply #3 on: September 18, 2019, 11:47:22 am »
Put the NPN inside the op amps feedback loop.
,
 
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Online Ian.M

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Re: How to design a simple one-quadrant voltage follower with little dropout?
« Reply #4 on: September 18, 2019, 12:24:59 pm »
That still doesn't help if the OPAMP is running from the same supply as the collector of the emitter follower.   You either need a boosted supply, or a topology similar to that used in a LDO regulator, e.g. a PNP pass transistor driven by an error amp, with the regulator's reference replaced by a fixed proportion of your target Vcc.

Also, if you've got to support a 5V target, its not exceptional to encounter the case where your target Vcc is up to 10% high while USB Vbus is as low as 4.75V.   That can result in target logic '1' level being over 0.7V higher than your devices, which is enough to cause issues for CMOS inputs that aren't over-voltage tolerant.

I therefore suggest that you boost to say 6.5V to allow enough headroom for a simple OPAMP + emitter follower to regulate your buffer Vcc to match a target Vcc of up to 5.5V.   If its only going to be powering a few buffers, there's probably no need to improve efficiency  disabling the boost for target Vcc below 3.5V.
 


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