Electronics > Projects, Designs, and Technical Stuff

How to even start routing this?

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SiliconWizard:
Sure. We don't exactly know what the complete circuit is, but it may perfectly fit in a MachXO2. If something a bit beefier is required, you can go for a Spartan 6 LX4/LX9 - all available in QFP.

amyk:
I didn't read each of the replies in detail to see if this was already posted: Think about how your signals flow and use that as a guide to placement. It may sound obvious but the more net crossings you eliminate, the easier it gets to route.

Joanna_H:

--- Quote from: SiliconWizard on August 03, 2019, 08:23:10 pm ---Sure. We don't exactly know what the complete circuit is, but it may perfectly fit in a MachXO2. If something a bit beefier is required, you can go for a Spartan 6 LX4/LX9 - all available in QFP.

--- End quote ---

I was looking at the MachX02 ( I think these are closer to CPLD than FPGA) , nice cheap little chip.  Could fit a hell of a lot of logic in one of those :D

I could still keep the modular design but massively reduce the chip count.   Would mean switching to 3v3 though.   But no biggy.  Should be fun, haven't touched verilog since the 90's lol

mikeselectricstuff:
Nice thing about the XO2 is it has onboard config memory, core voltage regulator and also an oscilllator, so minimal extra parts. A few package options from QFN32 to QFP144.

rstofer:
Start by selecting a small chip and write the code.  If it won't fit, move up a notch.  Unless you want to do a lot of extra work on the constraints file (pinout definition), just do synthesis and check for fit.  You can use simulation without defining the pinout, I think.

I tend to go the other way:  I buy a big chip and leave a lot of empty logic laying around.  I only have experience with Xilinx devices from Spartan II up into Artix 7.

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