Electronics > Projects, Designs, and Technical Stuff
How to improve AD834 based VGA circuit
dzseki:
I try to improve a variable gain amplifier based on the AD834 (500MHz) multiplier that I’ve made years ago, the thing is used for (CRT) home theater projectors as an improvement over original video chain design.
The source signal has a bandwidth of about 100MHz, and the idea would be to pass this signal with the least attenuation to the later circuit stages.
The design is based on a circuit found in the AN-212 application note of the AD834. Although for some reason I am failing to meet the performance that is presented in the application note. More precisely I am able to meet the 500MHz performance point within -3dB, but my frequency response is not as flat as I would like.
The problem is that one of the deepest point in the frequency response waviness is located right around 100MHz, about -1.5dB, the response eventually comes back at higher frequency but there the signal has very little harmonic content, therefore having a very subtle performance lead compared to slower multipliers, especially the AD835 (250MHz), with which I also have first hand experience.
With this circuit I have made several iterations both with component values and circuit layout already, but this waviness remained essentially the same.
As for the changes:
-I have tried different common base transistors, those only made things worse if any (in line with the application note’s suggestion)
-I have varied R31-32 resistors
-I have tried several opamps on the output (HFA1100, CLC449, THS3201, LMH6703) along with different feedback resistors, with these I could control the amplitude of the last peak before the final roll off, but overall had little effect on the flatness.
I am loading you with some data:
-the AN-212 application note for reference
-snapshot of the latest PCB layout
-circuit diagram
-frequency response (VNA)
David Hess:
--- Quote from: dzseki on May 23, 2019, 02:29:56 pm ---The design is based on a circuit found in the AN-212 application note of the AD834.
--- End quote ---
Which circuit? The 60 MHz resistor level shifted circuit or the 450 MHz bipolar level shifted circuit?
--- Quote ---Although for some reason I am failing to meet the performance that is presented in the application note. More precisely I am able to meet the 500MHz performance point within -3dB, but my frequency response is not as flat as I would like.
The problem is that one of the deepest point in the frequency response waviness is located right around 100MHz, about -1.5dB, the response eventually comes back at higher frequency but there the signal has very little harmonic content, therefore having a very subtle performance lead compared to slower multipliers, especially the AD835 (250MHz), with which I also have first hand experience.
With this circuit I have made several iterations both with component values and circuit layout already, but this waviness remained essentially the same.
--- End quote ---
I wonder if there could be a problem with the substrate you are using. Things can get weird when maximal bandwidth flatness is a requirement. Humidity might be used as a test to see if the substrate is absorbing water which is a common problem.
--- Quote ----I have tried different common base transistors, those only made things worse if any (in line with the application note’s suggestion)
--- End quote ---
What was their Ft? There is a deplorable availability of fast PNP transistors now since NXP discontinued theirs.
--- Quote ----I have varied R31-32 resistors
--- End quote ---
Which are those? The two schematics are not marked.
It seems like some type of equalization adjustment would be called for but the effect you are observing is pretty subtle.
You might consider using a more complex termination for the AD834 (or bipolar level shifter) involving a t-coil although construction can be difficult.
--- Quote ----I have tried several opamps on the output (HFA1100, CLC449, THS3201, LMH6703) along with different feedback resistors, with these I could control the amplitude of the last peak before the final roll off, but overall had little effect on the flatness.
--- End quote ---
Honestly I would be tempted to drop using the operational amplifier as a differential to single ended converter and replace the output stage with some sort of transconductance (series feedback) based bipolar transistor based version.
dzseki:
--- Quote from: David Hess ---Which circuit? The 60 MHz resistor level shifted circuit or the 450 MHz bipolar level shifted circuit?
--- End quote ---
Sorry for being unclear. The circuit is based on the „DC to 480MHz Voltage-controlled amplifier using active level shifting” circuit found on page 6-45 in the AN-212 App Note.
--- Quote from: David Hess ---I wonder if there could be a problem with the substrate you are using. Things can get weird when maximal bandwidth flatness is a requirement. Humidity might be used as a test to see if the substrate is absorbing water which is a common problem.
--- End quote ---
This could be a clue, as all my ICs are from old stock (early 90’s), although the chip itself is running rather hot, so it should evaporate the humidity pretty fast :P
--- Quote from: David Hess ---What was their Ft? There is a deplorable availability of fast PNP transistors now since NXP discontinued theirs.
--- End quote ---
At my first trial I used BFT95 transistors (ft: 5GHz) for the common base stage, but what I’ve got was a nice untamable oscillation. Then I stepped one back and used 2SA1765 transistors (ft: ~1GHz) while these were stable they were not giving any performance lead compared to 2N3906, so eventually in the end I used the 2N3906 as originally suggested.
--- Quote from: David Hess ---
--- Quote ----I have varied R31-32 resistors
--- End quote ---
Which are those? The two schematics are not marked.
--- End quote ---
Designators referenced to the VNB_DB_AD834_NO_GAMMA.pdf
--- Quote from: David Hess ---It seems like some type of equalization adjustment would be called for but the effect you are observing is pretty subtle.
--- End quote ---
Subtle, but not unreasonable I think. Also in figure 15 (in AN212) their version does look better although with 10dB/div it is a little bit hard to tell... Just for sure I also have a VNA shot with 10dB/div
--- Quote from: David Hess ---You might consider using a more complex termination for the AD834 (or bipolar level shifter) involving a t-coil although construction can be difficult.
--- Quote ----I have tried several opamps on the output (HFA1100, CLC449, THS3201, LMH6703) along with different feedback resistors, with these I could control the amplitude of the last peak before the final roll off, but overall had little effect on the flatness.
--- End quote ---
Honestly I would be tempted to drop using the operational amplifier as a differential to single ended converter and replace the output stage with some sort of transconductance (series feedback) based bipolar transistor based version.
--- End quote ---
Can you elaborate here a bit more what do you think about? (eg. the link is broken)
duak:
For what it's worth, here's a couple of thoughts:
- R36 & R45 seem high for collector load resistors for the desired bandwidth. The MMBT3906 has a Cob(max) of 4.5 pF which gives a corner frequency of 75 MHz. This roughly agrees with the observed results. Does reducing the values of R36 & R45 make a difference in flatness? ie., does the frequency of the first drop increase?
- capacitance on the inverting input node of U6 can cause gain peaking. Since there are two 470R in parallel with similar capacitance the corner frequency of the feedback network would be 150 MHz. This agrees roughly with the observed results. A small capacitor across R49 might reduce the level of the bump past the dip.
Here is a more precise analysis of the peaking phenomonon: http://www.ti.com/lit/an/sloa013a/sloa013a.pdf page 7.
dzseki:
--- Quote from: duak on May 24, 2019, 07:17:00 pm ---For what it's worth, here's a couple of thoughts:
- R36 & R45 seem high for collector load resistors for the desired bandwidth. The MMBT3906 has a Cob(max) of 4.5 pF which gives a corner frequency of 75 MHz. This roughly agrees with the observed results. Does reducing the values of R36 & R45 make a difference in flatness? ie., does the frequency of the first drop increase?
- capacitance on the inverting input node of U6 can cause gain peaking. Since there are two 470R in parallel with similar capacitance the corner frequency of the feedback network would be 150 MHz. This agrees roughly with the observed results. A small capacitor across R49 might reduce the level of the bump past the dip.
Here is a more precise analysis of the peaking phenomonon: http://www.ti.com/lit/an/sloa013a/sloa013a.pdf page 7.
--- End quote ---
Thanks, for the good idea. It is easy to try different R36 & R45 at least. if your assumption is right then the real deal would be to tune the input peaking of the opamp and the collector resonance to the same frequency so they would cancel out each other.
With the exact results however I have to wait next week, since I don't have a VNA at home (unfortunately :P)
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