It looks like the (sine) output of a XO does not like a dynamic load? OP, check your module's datasheet.
Clipped Sinewave to CMOS Conversion Circuit, Crystek App Note "... the TCXO will be pulled by the output transitions..."
This may mean using a comparator with hysteresis feedback to the oscillator output would cause trouble. I've never seen data on the "clipped sine-wave" oscillator circuit which seems common in the oscillator module industry.
Is it truly buffered from the crystal, or just the raw unbuffered gate output.
edit, found some answers:
Why do TCXOs have clipped sinewave outputs?"Most ceramic LCC packaged TCXOs are only available with clipped sinewave outputs. There are many reasons why this is done, even though it frustrates many of the circuit designers who want CMOS output levels.
* CMOS output would add significant power dissipation to the TCXO IC. The resulting temperature gradients on the IC and in the package would limit the ability to achieve the best TCXO compensation.
* The wide range of possible CMOS loads would alter the compensation design as internal thermal gradients result in the TCXO not meeting specifications.
* CMOS outputs result in power supply and ground transients when the output is changing levels. This noise would adversely affect the phase noise performance of the TCXO.
* CMOS outputs generate much larger EMI/RFI signals that can result in difficulties meeting the USA FCC and other countries radiated energy limits from the final system. The clipped sinewave, being both low amplitude and mostly sinusoiddal, results in low signal levels and less harmonics.
* Many of the applications where these TCXOs are used have ASIC inputs that accept the clipped sinewave and convert to CMOS logic levels internally.
See our FAQ about converting clipped sinewave levels to CMOS. It is easy to do and low cost."
Converting Clipped Sinewave Output to CMOS