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| how to route codec (ADC/DAC), analog pins not all on one side |
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| capt bullshot:
--- Quote from: loki42 on November 04, 2019, 02:50:57 pm ---I was using TL074 as well, i've tried both. I tried the MCP6004 for the lower current noise, but I might have misread the datasheet... :) It looks like it's got much lower current noise, and the the impedance I'm running at that should dominate over the voltage noise, I think? Either way it doesn't seem to be the main issue. --- End quote --- Agree, I believe it's not the main issue now. Don't look at the input noise specs alone, check CMRR / PSRR and your supply rail too. A noisy supply voltage can spoil your amps performance. 50mV peak-to-peak noise looks pretty hefty for audio stuff, should be way lower, so I believe there's more issues to your circuit than the layout and the choice of OpAmp alone. --- Quote ---With the virtual ground how do you then bias for the codec? The inputs need to be biased to VCOMAD right? --- End quote --- The codec has differential inputs, the typical bias required is VCC/2 when DC coupling is used. So any voltage near enough to VCC/2 can be used to bias the inputs and the OpAmp circuits. --- Quote ---I can try more decoupling on the VCOMAD / VCOMDA rails. They both have 10 uF caps on them then smaller caps near where they are used. The 10 uF are ceramic. --- End quote --- The datasheet suggests to use electrolytics. That may have two reasons: - In 2008, 10uF ceramics weren't that commonly available, so they just specified electrolytic - The circuit needs some ESR here, the ESR of a ceramic cap is too small and causes oscillation Regarding your ouput amplifier circuit: The input impedance is lower than the minimum allowed value regarding the datasheet - this might be an issue, though I don't think of a noise issue, rather limiting the max. amplitude. There's no CMRR or PSRR specified for the codec, so you want really clean power supply rails - did you check the analog VCC rail for noise, and does this noise correlate with the output noise? More ideas: What is the output noise if the output is digitally muted (digital processing outputs a continuous stream of zeros, not the processed input)? Remove the codec from the PCB, and replace it by bridge wires (codec input to codec output), then check the noise of the analog circuitry alone. |
| loki42:
MCP6004 PSRR 86 CMRR 76 Noise current 0.6 fA noise voltage 28 nV TL074 PSRR 86 CMRR 86 Noise current 0.01pA noise voltage 15 nV SO the CMRR could be an issue, but i've tested with the TL074 as well. What's the utility of using VCOM vs just a VCC/2 then for bias? No need for the extra resistors? If it's saving some resistors but needs an extra dual op amp as a buffer that sounds like I'm doing it wrong. Output noise is identical when muted. The relay based circuit had very low output noise. I'll try electrolytics there, I didn't think of ESR and wanted to save space. The VCC rail is going through an LDO and ferrite bead. The ferrite might not be filtering right as I do find using beads correctly a bit confusing. The power section is identical for the previous relay based version though, that didn't have the output noise issues. the VCC rails do have quite a bit of noise on them though. I'm not sure how much is too much, but it's around 85mv p p & RMS of 27mv. Maybe the new type of switching is causing the LDO to work harder? Previously the relay was running of the 3v3 supply and the CMOS switches are on the 5V. The codec is a bit fiddly to desolder and solder back on so I'll try the other options first... |
| capt bullshot:
--- Quote from: loki42 on November 05, 2019, 06:11:57 am ---MCP6004 PSRR 86 CMRR 76 Noise current 0.6 fA noise voltage 28 nV TL074 PSRR 86 CMRR 86 Noise current 0.01pA noise voltage 15 nV SO the CMRR could be an issue, but i've tested with the TL074 as well. --- End quote --- PSRR and CMRR decrease with increasing frequency, some manufacturers put diagrams of CMRR and PSRR vs. frequency into their datasheets. Anyway, ATM I believe the culprit is somewhere else, though some optimization might be achievable here once the root cause is fixed. --- Quote ---What's the utility of using VCOM vs just a VCC/2 then for bias? No need for the extra resistors? If it's saving some resistors but needs an extra dual op amp as a buffer that sounds like I'm doing it wrong. --- End quote --- Yes, it saves the resistors, handy if you don't need to buffer the voltage. --- Quote ---Output noise is identical when muted. The relay based circuit had very low output noise. I'll try electrolytics there, I didn't think of ESR and wanted to save space. --- End quote --- So it's related to the DAC part and the increase came with the analog MUX. I wouldn't expect any significant PSRR from a 4053 type analog switch --- Quote ---The VCC rail is going through an LDO and ferrite bead. The ferrite might not be filtering right as I do find using beads correctly a bit confusing. The power section is identical for the previous relay based version though, that didn't have the output noise issues. the VCC rails do have quite a bit of noise on them though. I'm not sure how much is too much, but it's around 85mv p p & RMS of 27mv. Maybe the new type of switching is causing the LDO to work harder? Previously the relay was running of the 3v3 supply and the CMOS switches are on the 5V. The codec is a bit fiddly to desolder and solder back on so I'll try the other options first... --- End quote --- The noise on the supply rail is way too high for any kind of audio circuitry, single digit mV or even less is what you want. Even for a digital rail I'd consider this too high. I'd guess this couples through the DAC part of the codec. Ferrite beads have little to no effect within the audio frequency range, usually they show significant damping from single digit MHz upwards. An LDO might not be sufficient to dampen switch mode supply noise, some LDOs have really poor PSRR above some 100Hz. RC or RLC filtering the LDO input can help here, or use a rather expensive LDO that has a good PSRR for higher frequencies. SMPS noise can couple through GND into analog circuitry, too. |
| loki42:
I think the actual number of the noise measurements are probably gibberish. The differences in levels between the two units probably is useful though. I'm checking that with oscilloscope probes so I'm getting a ton of extra noises. The LDO I'm using is a MCP1802, it's described as high PSRR (70dB @ 10kHz) the SMPS is TPS562200DDCR, which on the TI power designer sim has 25 mv p to p ripple |
| capt bullshot:
--- Quote from: loki42 on November 07, 2019, 01:00:17 am ---I think the actual number of the noise measurements are probably gibberish. The differences in levels between the two units probably is useful though. I'm checking that with oscilloscope probes so I'm getting a ton of extra noises. --- End quote --- If you can, check the noise with the switcher disabled, otherwise same setup. --- Quote ---The LDO I'm using is a MCP1802, it's described as high PSRR (70dB @ 10kHz) the SMPS is TPS562200DDCR, which on the TI power designer sim has 25 mv p to p ripple --- End quote --- Looks OK in the first place, the LDO appears to have a quite poor input step / transient response at a few 100kHz, so I still could imagine the switching frequency (not the ripple, but rather the switching transients) passing through. One should see a significant difference with the switcher disabled then. Otherwise, 650kHz / 25mV is rather easy to filter, but one must be careful to avoid interference propagated through GND and external wiring (maybe add a common mode choke to the power input) Anyway, I'm starting to run out of ideas now ... |
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