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how to route codec (ADC/DAC), analog pins not all on one side

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loki42:
So I'm attempting to route codec (PCM3168A) and if you look at figure 64 in the data sheet the layout example is rather minimal. The input and output digital interface is on the left and right sides of the chip and the analog input and output are on the top and bottom. This appears to make it almost impossible for me to not cross digital and analog traces. I'm rather worried about introducing digital noise into the inputs and outputs. Should I basically cut around the digital section with the ground plane keep out and then route the one sides digital traces under the component? Then nothing needs to cross the digital / analog plane boundary. My current layout has traces crossing and noise performance isn't near spec. 3.3 and 5 v are coming from separate LDOs, VCOM is buffered and I'm following the data sheet for bypassing.

Are there any layout examples for a similar chip? The example board from TI isn't handy.

capt bullshot:
Just don't split AGND and DGND, use one solid GND plane for everything (your whole board). Use the series resistors as indicated pg. 51 of the datasheet, these mitigate digital noise. Best placement of them would be at the respective signal source pin. Keep the other digital stuff (as indicated control MCU) slow (e.g. set the pin drivers of the MCU to their slowest working edge drive mode), and / or use series resistors too here. Otherwise, don't mix up analog and digital circuitry in your layout, and don't route digital traces (except the ones required for operation of the codec) through the analog part. Laws of physics take care now to keep the digital noise away from the analog though you don't split the plane.

loki42:
Sounds good. Is there a way I should route the two i2s signals around the respective analog in and out? Is under the part the right approach or should I cross them?  I.e. the d out and d in are both going to the MCU.

SiliconWizard:
With a 4-layer board, you could just route the digital signals on the top layer, and the analog on the bottom, or conversely. There would be a solid ground plane (inner layer) between them.

capt bullshot:
Depends on how many layers your board has. The codec has a thermal pad, so you can't lay any traces on the top layer (I'd recommend against this anyway), and you shall not split the ground plane under the device, so you can't place traces to the layer carrying the plane, so often there's the only choice to route them outside. If you have enough layers, place a GND plane layer between the chip and these traces. I2C is rather slow and often used for initialisation of the codec, so you should have an eye on your software when it uses these lines, preferably keep them quit and in idle (high) state when playing or recording sound.

Edit: Crossing the analog signals with the I2C signals on another layer most probably is the better way than routing the I2C all around the analog part. Avoid looping digital signals around the analog circuitry.

Edit 2: Keep your power supplies to the codec clean. Not the 5V analog only but also the digital 3.3V. Sometimes a seperate linear regulator for these voltages helps, sometimes LC or RC filtering. Be careful with LC filtering, add enough damping to keep it from ringing. If there's a single (or very few) chip digital circuitry with little noisy digital I/O, one might get away with the proper usage of ceramic bypass caps on a common voltage rail.

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