Looks similar to a Bruene coupler, sans the low side of the capacitive voltage divider.
Thanks for the lead on this! It looks like it is indeed similar.
I've done hours of more head-scratching and simulation work and the circuit is much more nonlinear than I expected
Click for big
So coming back to his schematic:
Here's how it works:
Current flows in the same direction on the schematic on primary and secondary side (same polarity voltage = opposite polarity current!)
The node between D16 and D17 is clamped to approximately +/-2V by the diode ring.
Because of the above, we can think of C47 as being from the output voltage to essentially ground, as the voltage on the other side of C47 is much greater than 2V in magnitude. Therefore, the current through C47 is approximately the same as it would be were it connected to ground--in quadrature with the output voltage and equal to approx Vout / 1173 ohm (either RMS or peak since it's a sinusoid)
When primary current is flowing left to right--i.e. towards the soldering iron tip--D16 and D17 are reverse-biased, and therefore no current flows through R40
When primary current is flowing right to left, the current induced in the secondary flows through D16 and D17, and the additional current injected by C47 has nowhere to go but into R40--until the voltage at that node gets high enough that either D21 or D22 is forward biased. Because the current injected by C47 is so high, this results in R40 effectively seeing a square wave current which you can see in the LTSpice simulation above.
So if we want to create a simplified model of how R40 is being driven, we can think of it like this:
- Not driven when primary current is flowing left to right
- Driven at +2V when primary current is flowing right to left and current is flowing down through C47
- Driven at -2V when primary current is flowing right to left and current is flowing up through C47
Because the current through C47 is 90 degrees out of phase with the output voltage we can then reach the conclusion that
if the output current and voltage are in-phase, periods 2 and 3 are of equal time and thus the voltage at C1 is zero. Of course, that voltage is also being pulled towards 0.8V via its connection to the feedback loop of the DC-DC, but we'll ignore that for now.
If the output voltage starts to lead the output current, then period 2 will lengthen and period 3 will shorten, and the voltage on C47 will be pulled higher. Likewise if the current leads the voltage, the inverse will happen and the voltage on C47 will be pulled lower.
So in essence this is not as dependent on the magnitude of output current and voltage, and much more on the relative phase, which makes sense.