Author Topic: IC advice to create a regolable oscillator from 0 to 500kHz  (Read 7409 times)

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Offline iMo

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Re: IC advice to create a regolable oscillator from 0 to 500kHz
« Reply #25 on: April 02, 2019, 10:19:59 am »
If you want to learn something useful, download the LTspice and you will get a tool which works..
Does the astable with the 74HC74 work though?
Sure, you would need a '74 model with real transistors in it.
Readers discretion is advised..
 

Offline Zero999

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Re: IC advice to create a regolable oscillator from 0 to 500kHz
« Reply #26 on: April 02, 2019, 11:26:59 am »
If you want to learn something useful, download the LTspice and you will get a tool which works..
Does the astable with the 74HC74 work though?
Sure, you would need a '74 model with real transistors in it.
I take that as a no then. How about using slightly different values of R or C, for each side of the timing circuit? It might work then. Simulators often struggle with a perfectly symmetrical astable multivibrator, which doesn't represent reality. I would do it myself, but can't download the 74HC74 model at the moment.
 

Offline stockvu

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Re: IC advice to create a regolable oscillator from 0 to 500kHz
« Reply #27 on: April 02, 2019, 12:55:41 pm »
Your spec of 0 to 500 kHz is pretty tough for a discrete circuit to realize (in a repeatable fashion) such that you know what the current frequency (and perhaps duty-cycle).

I'd suggest buying a good bench-top frequency generator as one solution ~$100-200.

Another way is to buy a AD9833 Direct Digital Synthesizer module (~$5 on eBay) and run it using a PIC or Arduino micro-controller board.

That low-cost AD9833 DDS can really deliver (0.1 Hz resolution) from 0 to 12.5 MHz, especially in a Square wave output. I use them for my projects with an Arduino 2560.

I realize this approach is way beyond using a few discrete chips. However, if you what you need MUST be repeatable and accurate, its likely worth considering.

hth
 

Offline ogden

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Re: IC advice to create a regolable oscillator from 0 to 500kHz
« Reply #28 on: April 02, 2019, 02:55:32 pm »
That low-cost AD9833 DDS can really deliver (0.1 Hz resolution) from 0 to 12.5 MHz, especially in a Square wave output.

Square wave output of this DDS is just MSB of the DAC - far from DDS resolution with jitter for most (noninteger) frequencies. AD9851 have built-in comparator for proper square wave output, yet it is huge overkill for 0..500KHz application.

Further reading.
« Last Edit: April 03, 2019, 09:41:12 am by ogden »
 

Offline iMo

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Re: IC advice to create a regolable oscillator from 0 to 500kHz
« Reply #29 on: April 02, 2019, 05:00:27 pm »
Square wave output of this DDS is just MSB of the DAC - far from DDS resolution. AD9851 have built-in comparator for proper square wave output, yet it is huge overkill for 0..500KHz application.
Nope. The 9833's "MSB" is with 28bit resolution. Therefore the square wave too.
It is the same situation as with the 9851 and its comparator.
« Last Edit: April 02, 2019, 05:03:25 pm by imo »
Readers discretion is advised..
 

Offline ogden

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Re: IC advice to create a regolable oscillator from 0 to 500kHz
« Reply #30 on: April 02, 2019, 05:27:01 pm »
The 9833's "MSB" is with 28bit resolution. Therefore the square wave too.
It is the same situation as with the 9851 and its comparator.

Yes you are so right. My bad  :P
It is output jitter up-to 1/FCLK for 9833 that differs between two.
 

Offline stockvu

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Re: IC advice to create a regolable oscillator from 0 to 500kHz
« Reply #31 on: April 03, 2019, 03:28:14 am »
Quote
Square wave output of this DDS is just MSB of the DAC - far from DDS resolution. AD9851 have built-in comparator for proper square wave output, yet it is huge overkill for 0..500KHz application.

Hi. Well, I don't think the OP specified things like jitter or settling time -- but I may have missed it. I don't have a Jitter Test Set or a Spectrum Analyzer to evaluate these 9833 circuits. On my low cost scope, the outputs seem stable and agree well with freq counter.

I run one DDS 100x higher in frequency and then pipe it into the 2560 Timer-5 input. There its divided by 100 and T5's Output-Compare generates selectable duty cycle from 5-95% (no comparator needed). An added benefit is 0.1 Hz resolution now becomes .001 Hz. 

So I admit its overkill -- but I like overkill when its cheap. :)
 

Offline ogden

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Re: IC advice to create a regolable oscillator from 0 to 500kHz
« Reply #32 on: April 03, 2019, 07:37:18 am »
Hi. Well, I don't think the OP specified things like jitter or settling time -- but I may have missed it.

He did not. Knowledge may be useful for others who read this.

Quote
I don't have a Jitter Test Set or a Spectrum Analyzer to evaluate these 9833 circuits. On my low cost scope, the outputs seem stable and agree well with freq counter.

It is hard to notice on low output frequencies. FCLK/4 have no jitter but FCLK/2.5 is worst case. Look at > 4 periods on scope and you will see. BTW you don't even have to put DDS into MSB mode - just look at DDS DAC output w/o LP filter at FCLK/2.5. It will be eye-opening on itself. Then you start to realize how critical is output low pass filter especially for high freq output of DDS, why sometimes it is designed to be steep 7-th order or even better, filter. Disclaimer: all noninteger (relating to FCLK) frequencies have this behavior, FCLK/2.5 was just simple worst case pick.

[edit] Ups. I talk about non-integer divisors, yet use round number, 3  :palm:  Fixed to FCLK/2.5
« Last Edit: April 04, 2019, 02:53:49 pm by ogden »
 

Offline stockvu

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Re: IC advice to create a regolable oscillator from 0 to 500kHz
« Reply #33 on: April 03, 2019, 01:58:56 pm »
Quote
It is hard to notice on low output frequencies. FCLK/4 have no jitter but FCLK/3 is worst case. Look at > 4 periods on scope and you will see.
Quote
BTW you don't even have to put DDS into MSB mode - just look at DDS DAC output w/o LP filter at FCLK/3. It will be eye-opening on itself.

I take output off the DAC MSB. I don't need the triangle or sine outputs. My use of this circuitry never sees an RF channel, it doesn't get low-passed since it feeds digital chips downstream.

Thanks for the tip on looking >4 periods, that's good to know. If I do have some jitter, its not a problem for my application.

I just threw in the DDS idea as another option for the OP to consider.


 


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