I heard someone I know had trouble passing signals through it, the 'papers?' pin kept going high every time. (small carbon contact in the middle of the underside of the package)
Is there a bias contact on the package itself? Is there a standard bias voltage, or does it vary based on long-lost per-batch documentation?
My understanding is that soviet chips were about 9 years behind western ones. They were a mixture of copied masks, hand retouched and adjusted for the local fabs, and original soviet layouts. The latter were often basic RTL or TTL logic gates , fabbed as a common layout that was customized in the final metal layer.
RTL and TTL don't typically use a substrate bias voltage. A bias is typically need with NMOS and CMOS. Starting in the mid-1970s that bias was generated by an on-chip charge pump, saving a pin or two at the ever-decreasing expense of a little area and tighter process control.