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Improving CT conditioning circuit
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Red_Micro:
The circuit attached is an inverting amplifier with variable gains. The CT measures 60 Hz currents from 0 to 30A. It has high sensitivity since it's used to measure low ground fault currents. I added a DC bias to the AC signal as shown for the ADC processing. I have the following questions:

1. As I'm using an IC (LM4041) for the voltage reference, would I need to buffer it with the op amp?
2. I added a coupling cap C3, but not sure how it would affect my signal. It's a high pass with a cut off frequency of ~20Hz. C19 forms a low pass filter. Should I leave C3 for this application?
3. If op amps are cheap or low quality, would the offset voltage affect significantly?
4. If for some reason the primary current exceeds 30A, would diodes across the CT help clamp any over voltage? I usually see diodes used when the signal swings around zero, but in this case it swings around 1.65V (3.3/2).

Any suggestion is appreciated.

Kleinstein:
The CT does not have a DC offset. The capacitor C3 mainly effects how much the OPs offset is amplified. So without C3 the offset at the output is 2 or 8 times larger.  In addition there is a tiny DC current to the CT that in theory shift the distortion a little, but not much.
So the offset from the OP also appears at the output. It depends on the way the ADC data are processed if this is a problem or not.

The LM4041 reference has a resonably low output impedance and the load from the amplifier is relatively low. So one can get away without buffering the reference. Ideally the reference for the offset / DC bias should be the one also used for the ADC.

duak:
Red_Micro,

1. do you expect any extreme fault currents in the primary conductor?  If so, R34 could be damaged and without a burden resistor a much higher voltage could be applied to the circuit.  Is R34 sized for a reasonable short term overload?

2. will the primary conductor have a high AC voltage on it?  There will be some capacitive coupling between the conductor and the secondary winding that is probably insignificant.  Have you calculated or measured what the leakage current might be?

3.  the net marked "Vcc/2" actually has a reference voltage on it, no?   I'm assuming that ADC_in2 is sampled to read the DC offset of that net to determine the 0 V point for the ADC_in samples.

4. the 100R & 0.01uF RC filters have corner frequencies of 159 KHz.  This seems too high to do much good.  What is your samping rate?  Is it synchronous to the line frequency? 

5. C18 and R34 form an RC filter with a corner frequency of 1.59 MHz.  This also seems high.
Red_Micro:

--- Quote from: duak on March 31, 2020, 07:26:04 pm ---Red_Micro,

1. do you expect any extreme fault currents in the primary conductor?  If so, R34 could be damaged and without a burden resistor a much higher voltage could be applied to the circuit.  Is R34 sized for a reasonable short term overload?

2. will the primary conductor have a high AC voltage on it?  There will be some capacitive coupling between the conductor and the secondary winding that is probably insignificant.  Have you calculated or measured what the leakage current might be?

3.  the net marked "Vcc/2" actually has a reference voltage on it, no?   I'm assuming that ADC_in2 is sampled to read the DC offset of that net to determine the 0 V point for the ADC_in samples.

4. the 100R & 0.01uF RC filters have corner frequencies of 159 KHz.  This seems too high to do much good.  What is your samping rate?  Is it synchronous to the line frequency? 

5. C18 and R34 form an RC filter with a corner frequency of 1.59 MHz.  This also seems high.


--- End quote ---

1. Yes, I'm expecting some short term extreme fault (no frequent though). I'm sizing R34 1W-2W maybe. I'm still thinking of adding some diode.
2. I haven't calculated such leakage current between primary and secondary. I feel tempted to not put the coupling cap or at least leave the footprint on the PCB.
3. Vcc/2 is the voltage reference coming from the LM4041 IC. It's for the DC offset, and it also goes to an ADC input. I'm thinking of removing the buffer since the reference IC may handle that load well.
4. I haven't defined my sample frequency. Not synchronous with the line frequency though. As the signal is 60 Hz, the sampling freq probably won't be high.
5. You're right. Increasing C18 to 100nF would be better.
Kleinstein:
Back to back diodes parallel to the CT can be used to limit the voltage in a fault case. If the output voltage is too high and thus one starts to see diode leakage one could also use 2 diodes in series each. The diodes are more effective than just a higher power resistor, as they also protect the rest of the circuit.

There is no real need to also sample the ref. voltage from the LM4041, it would be more like to use one reference for the ADC and the auxiliary DC level now coming from the LM4041.  The final DC offset removal would be from the normal signal channel anyway. The CT transformer output is pure AC, so any DC residual is just amplifier / ADC offset.
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