Hi everyone! Figured it was about time I stepped out of the 'kiddy' Beginner's forum and attempted a real significant project.
Iv'e been looking into developing a mostly SMT board for AF spectrum viewing that operates almost entirely around a micro. I've done a lot of research, and I'm even working on schematics, but I shouldn't get ahead of myself. I'm still assessing whether or not I can do it within my specifications.
General Idea:
For quite some time I've been wanting to christen my studies in electronics with something I've been wanting for a while now. A high-speed, high-resolution (lots of bins) audio spectrograph/FFT. I have seen several of these on the forum and on YouTube, but none that are quite as fast as what I want. Or the ones that are fast have very low spectral resolution (RBW).
My Selection:
I have no idea how to do CPLD's and certainly not FPGAs, cause those are a pain to deal with, are almost exclusively BGA packages, and once this thing is programmed I wont need to really fundamentally change it's function other than maybe to add a feature or two. Also I'm a programmer so I'm keen on the idea of using a uC. I spent time looking at micros from PIC, Atmel, and a couple others, and I hope you all won't shoot me but I think I've decided on one.
AT32UC3B (AT32UC3B1256 specifically, it's the QFP48 instead of 64 as I don't need all the pins)
http://www.atmel.com/Images/doc32059.pdfhttp://www.digikey.com/product-detail/en/AT32UC3B1256-AUT/AT32UC3B1256-AUT-ND/1769700It's loaded with really awesome features, but particularly
a DSP instruction set, which I think if I can utilize will essentially hardware-accelerate the rate at which I can perform FFTs on a rolling buffer of sample data from an ADC. It can run at up to 80Mhz, but the only issue that I can find is that this micro doesn't actually support external addressable memory, so I can't use a big old dedicated SRAM device, only internal which is limited to 32Kbyte. And that's 32K before I start piling things like the necessary DMA config and the massive but luxurious USB+CDC drivers. Seeing as sampling for FFTs is pretty memory-intensive, I decided to create a brief text document with some notes about what I would actually need at bare minimum in terms of the ADC and memory. Please comment on any lapses in judgement you can see:
Sampling and memory:
Sample window must be at least 100ms long in time. (to contain two full cycles @ 20hz)
Sample rate must be at least 40ksps (for 20khz bw) or 20ksps (10khz bw)
The sample memory must contain 4000 samples (40ksps / 10 windows per second)
The sample memory must be (SAMPLERATE*WINDOW*REALITIES*BYTESRESOLUTION*NUMBUFFERS)bytes in size:
where SAMPLERATE = 40,000 (ksps)
where WINDOW = .1 (for 100ms)
where REALITIES = 2 (for real and unreal components of the FFT)
where BYTESRESOLUTION = 2 (to contain 10-bit ADC results)
where NUMBUFFERS = 2 (to provide working set and backbuffer memories for result transfer [DMA])
Gives 32,000 bytes memory requirement.
NOTE: only 16,000 bytes required for 20ksps (10khz bw). In theory, this could fit onboard
the AT32UC3B1256, if the USB Driver and controller are not configured in memory. It is an
extremely tight fit with just under 16k SRAM available while the USB device driver configuration
loaded into memory. Without the USB CDC, it is difficult but not impossible to verify the
full performance of the converter during development. The AT32UC3B1256 communications interface could be switched
to SPI, but the maximum clock speed of the peripheral bus remains to be determined at this time and will dictate
plausability of SPI comms interface.
FFTs:
The display must update at a minimum rate of 30 frames per second, displaying full new fourier
transform data. The actual display is being handled by a seperate device, so this means the
AT32UC3B's completed FFT data must be shifted out this many times per second.
Assuming 30 full transforms/sec, the uC must process SAMPLERATE*WINDOW*FFTRATE samples/sec via DSP instructions.
Given the assumptions from before, this equates to 120,000 samples processed per second.
Questions:
How long does it take to perform a single, full FFT at only 12Mhz (OX fundamental)?
Can 30 FFTs (120,000 samples) be processed via DSP in under 1 second?
How long does it take to transfer the entire FFT result from the memory backbuffer over SPI or I2C?
Can the FFT result be serialized on an output in a shorter amount of time than the conversion? (critical)
General architecture that I'm looking to build;
And I've spent some time working out which pins will be used for what (since they're all multiplexed across each other this took some time).
I've never 'engineered' before, and I'm still quite a beginner (how to EE?). Just been lurking and reading into these things. Am I headed in the right direction in terms of the questions that I'm asking myself? Oh, and I have also been looking at Atmel's own evaluation board for this microcontroller:
http://www.atmel.com/Images/EVK1101_Schematics_RevB.pdfIs it acceptable for me to refer this to make sure that my power supply circuitry, grounding, decoupling and general stuff is alright in my own schematic? I know each micro has its own demons and I just want to be sure the thing doesn't start tripping BOD when I start multiplying in that PLL to get the core clock up to 50Mhz-80Mhz range.
P.S.: To whomever actually read this whole post you're already a hero.
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