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Intel pciE Gen4 Retimer spec = FUBAR? :o

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frogblender:
Here is Intel's spec for standardizing Gen4 PCIe retimer pinouts:   https://intel.ly/3zcOW8B

It specifies the bga pinout for x4, x8, and x16 pinouts.  But for the x16 section only:  their table of pin numbers doesn't jive with their BGA drawing pin numbers (see attached).

For the x8 section in the spec, the table and BGA drawing jive OK.

But for x16, something is messed.  Anyone know what is going on? :o

EDIT:   the circled in ORANGE in the image is just ONE example.   NONE of the pins match.   For example,  in the table, pins EU26, EW29, N34, R35, Y34, AB35 don't exist on the bga drawing (which only goes up to row 24).

ajb:
Seems like just a couple of typos  :-//

23->34 or 24->35 are easy typos to make if your hands are misaligned on the number row.  Looks like the letters are wrong as well, but it's hard to read the text on your screenshot, even with the full image open.  It's annoying that the table doesn't seem to be correct, but these are the kind of errors humans will generally overlook very easily, so not a great shock that they snuck through into the final doc. 

evb149:
q.v. Figure-3-4 bottom two rows for N34

frogblender:
EDIT:  attached is higher-res shot of the bga drawing.  NONE of the bga pins match any of the pins in the table.

frogblender:

--- Quote from: evb149 on June 12, 2021, 09:15:38 pm ---q.v. Figure-3-4 bottom two rows for N34

--- End quote ---
Yes, Fig3-4 does match the table.  But the table lacks all power and grounds....

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