Author Topic: Interesting new USB chips from WCH  (Read 1073 times)

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Offline spostmaTopic starter

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Interesting new USB chips from WCH
« on: September 25, 2023, 03:54:22 pm »
I found some interesting new/improved USB peripheral chips:

Overview:
https://www.wch-ic.com/products/categories/46.html?pid=1

of which I like especially:
CH342 USB to VCP/CDC 3 Mbps speed dual serial port
with ID EEROM and RS485 support and 1.8 - 5V I/O, in a 10- or 24-pin package:
https://www.wch-ic.com/downloads/CH342DS1_PDF.html
https://www.lcsc.com/product-detail/USB-Modules_WCH-Jiangsu-Qin-Heng-CH342K_C2826608.html

CH347 USB to VCP/CDC/HID 9 Mbps UART + (UART / I2C+SPI / JTAG) serial port
with ID EEROM and RS485 support (3V3 I/O), in a 20- or 28-pin package:
https://www.wch-ic.com/downloads/CH347DS1_PDF.html
https://www.lcsc.com/product-detail/USB-ICs_WCH-Jiangsu-Qin-Heng-CH347T_C5122332.html
Could be perfect for low-cost chip programmers!

Drivers for linux:
https://github.com/WCHSoftGroup/ch343ser_linux

Another interesting one; USB Host and Device HID (Mouse+Keyboard) over serial link e.g. for KVM switches:
https://www.wch-ic.com/downloads/CH9350DS_PDF.html
 
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Offline moffy

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Re: Interesting new USB chips from WCH
« Reply #1 on: September 25, 2023, 09:50:48 pm »
I have purchased one of the CH347 boards in the hope of using it to read a 1MS/s SPI ADC, but it has no interrupt capability on the chip. I spoke with one of their reps and he said that the capability was there it just hadn't been added to the DLL. Said that an update would be coming around September, but as yet nothing.
 
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Offline spostmaTopic starter

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Re: Interesting new USB chips from WCH
« Reply #2 on: September 27, 2023, 12:08:12 pm »
update; I saw in the footnotes that the CH347 is a high speed USB2 device rather than a low-speed device,
and that it seems also to support an SWD mode, so it is useful as debugger device as well:

CH347 implements 480Mbps High-speed USB to JTAG, USB to SWD, USB to High-speed SPI, USB to I2C, USB to High-speed UART, etc.
It can be used for CPU debugger, FPGA downloader, programmer, etc
 

Offline PCB.Wiz

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Re: Interesting new USB chips from WCH
« Reply #3 on: September 27, 2023, 06:19:59 pm »
Yes, a nudge slower top baud than ft232h but cheaper, smaller, and better baud granularity above 2Mbd
Iirc I tested 96MHz/N for 2M+, and 144M/N for the > 6M speeds.
 

Offline PCB.Wiz

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Re: Interesting new USB chips from WCH
« Reply #4 on: September 27, 2023, 06:22:28 pm »
On interesting new USB chips, I also see lattice have a new fpga with HS-USB hardened module.
 

Offline tszaboo

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Re: Interesting new USB chips from WCH
« Reply #5 on: September 27, 2023, 07:44:45 pm »
Yes, a nudge slower top baud than ft232h but cheaper, smaller, and better baud granularity above 2Mbd
Iirc I tested 96MHz/N for 2M+, and 144M/N for the > 6M speeds.
How fast can you clock the SPI?
 

Offline PCB.Wiz

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Re: Interesting new USB chips from WCH
« Reply #6 on: September 27, 2023, 09:03:34 pm »
Yes, a nudge slower top baud than ft232h but cheaper, smaller, and better baud granularity above 2Mbd
Iirc I tested 96MHz/N for 2M+, and 144M/N for the > 6M speeds.
How fast can you clock the SPI?


Data specs :

Built-in 12K bytes RX-FIFO and 4K bytes TX-FIFO for each UART.  Presumably also for SPI ?
2.4. SPI synchronizes serial interface
  • Works in Host/Master Host mode.
  • Provide SCS, SCK/CLK, MISO/SDI/DIN, MOSI/SDO/DOUT four signal lines.
  • Supports 2 chip select signal lines and can operate two SPI interface devices by time-sharing.
  • Supports 8 bit /16 bit data structure, supports MSB and LSB transmission.
  • Supports SPI mode 0/1/2/3, and supports transmission frequency configuration up to 60MHz.
but unclear if that means master and slave ? - I guess that is master speeds.
 

Offline tszaboo

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Re: Interesting new USB chips from WCH
« Reply #7 on: September 27, 2023, 09:19:13 pm »
Yes, a nudge slower top baud than ft232h but cheaper, smaller, and better baud granularity above 2Mbd
Iirc I tested 96MHz/N for 2M+, and 144M/N for the > 6M speeds.
How fast can you clock the SPI?


Data specs :

Built-in 12K bytes RX-FIFO and 4K bytes TX-FIFO for each UART.  Presumably also for SPI ?
2.4. SPI synchronizes serial interface
  • Works in Host/Master Host mode.
  • Provide SCS, SCK/CLK, MISO/SDI/DIN, MOSI/SDO/DOUT four signal lines.
  • Supports 2 chip select signal lines and can operate two SPI interface devices by time-sharing.
  • Supports 8 bit /16 bit data structure, supports MSB and LSB transmission.
  • Supports SPI mode 0/1/2/3, and supports transmission frequency configuration up to 60MHz.
but unclear if that means master and slave ? - I guess that is master speeds.
Oh, I have to read the datasheet better, it's getting late here.
60MBit is quite good, I wonder if it's burst or sustained.
I remember more than a decade ago, we had this 3 Mbit UART for a PIC32, and we were losing data all the time. Then we figured out that it was using a single core of a 3 GHz PC to keep that UART fed with data. Hopefully they have good drivers.
 


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