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Interfacing high speed ADC to microcontroller
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DaJMasta:

--- Quote from: jonroger on April 16, 2019, 05:45:21 pm ---You could create your own FIFO using static ram.  But micro-controllers are so simple and cheap that I'd also look at using several of them.   Perhaps 5, each sampling at 6 Msps (20 instructions is probably enough to do something where 4 isn't).

--- End quote ---

Unless you have an obvious choice of micro with a lot of SRAM built in, this would be my choice for what you're describing.  Write directly to an external memory then have the micro load and process it.  40kS with 12 bit depth is certainly achievable with a micro's internal memory, but you're going to be looking at the high-tier priced parts, since 64kb probably wouldn't suffice after memory for your program and 40kS worth of storage, whereas a 64kb SRAM for samples and whatever amount you need on the MCU itself gives you a lot more flexibility with MCU choice and probably saves you a good bit on the price as long as you can afford the board real estate.  Though, I guess, as far as 120MHz ARM M4s go, maybe you do actually have the SRAM onboard already, so just doing the whole thing on the MCU is paid for  :-//
ejeffrey:
TBH, this doesn't sound too hard as stated.  It should be obvious that the microcontroller core can't do this in real-time, so you will need a GPIO DMA with enough speed and bits to handle your ADC.  You also need the clock to work, so either you need a GPIO peripheral that can be externally clocked or you need the sample clock to by synchronous with your master clock.  These requirements plus sufficient SRAM should filter you down to a handful of candidate parts and you can easily compare the cost and power budget vs. an external SRAM based FIFO or a small FPGA.

The thing to emphasize in your comparison is flexibility and extensability.  40,000 samples is maybe fine, but then what happens if your requirements change to take 80,000 samples?  With an SRAM based FIFO you just pick a bigger SRAM chip and add one address line.  With an FPGA you may not need to do anything if it already has enough SRAM built in, otherwise maybe you migrate to a larger pin compatible part in the same family.  With an MCU you probably have to scrap the project and start over with an FPGA, or at the very least do a complete redesign with multiple interleaved MCUs.  If there is any chance you will need to process the data in real time (for instance to detect some error/out of range condition and trigger a halt in deterministic time), you want an FPGA.
Marco:
Here's someone saying he managed 30 MHz with just triggered DMA and GPIO.

FSMC/FMC might work better.
MasterT:

--- Quote from: Marco on April 16, 2019, 07:54:28 pm ---Here's someone saying he managed 30 MHz with just triggered DMA and GPIO.

FSMC/FMC might work better.

--- End quote ---
I did some test using stm32f446re, same family uCPU as f429, and mistakenly marked 36 MHz. After close inspection using two synchronous 4-bits counters 74lvc161 /163 and sorting input array for "missing code" , I downscaled my results. Down to 11.5 MHz !  So, it looks in theory like DMA has no limits to push data to memory, but reality shows a lot more details need to be considered. If GPIO port directly mapped to specific data bus, if there are "bridges" - what latency they have, etc.
In summary, I'm absolutely sure 120 MHz uCPU NO Way could manage 60 MBytes/sec . For comparison, my stm32f446re is 180 MHz core, dual DMA - though only one may have an access to GPIO.
splin:
The LPC4370 seems to be a no-brainer given that a 30MSPS 12bit ADC alone will likely cost you more - at Digikey the 40MSPS MAX1421ECM+D costs $7.24 @ 1K compared to $6.4 for the LPC4370FET100E. You will need to add an SPI FLASH but they are fairly cheap and physically much smaller than most standalone ADCs.

The encrypted version (for firmware copy protection), LPC43S70FET100551, is only $5.09 from Avnet for which you get 282K RAM, a 204MHz M4 plus 2 x 204MHz M0 processors, Ethernet, USB and a powerful configurable serial peripheral etc. thrown in for free with the 80MSPS ADC.

If it turns out to be advantageous to proceess in real-time then using the SIMD instructions you could get up to 12 instruction cycles per sample - not a lot but the ADC does have hardware high/low limit comparators which might help.

Biggest issue might be the long term availability of the part but on that front you might not want to be comparing with a MAXIM ADC either - a TI part is over $10.
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