is it okay to use an LDO at lower or the same as its rated output voltage/

[drakejest]

So i am driving a PMOS gate that is specd at a maximum of +-12v, the mosfet driver im using typically uses the Vcc which can range from 5v to 24v to drive the gate. aat -4.5v the PMOS is rated to be fully on. You may notice a problem, the maximum the driver will use is 24v, this is way beyond what the gate-source of the PMOS can handle.

So i was thinking of instead the driver getting from the Vcc directly , i will place a 5v LDO and have the driver source from that, this ensures that the gate voltage will never go beyond the 12v rating of the mosfet.

So for input voltage of 7v-24v, the gate will always see 5v, good. But my concern is for input voltages equal to 5v , with a 5v input will the ldo  be able to deliver those burst requirement of the mosfet driver ?

The LDO in question is a classic 7805 by STM STM L7805

changing mosfets which have a greater gatesource voltage is not really an option as i could not find a better alternative to where i buy my parts from.

[T3sl4co1l]

7805 isn't LDO, it's just put in that category for convenience.  Low dropout would be less than a Vbe (~0.7V), give or take.  But anyway, it sounds like you have more than enough supply available, any reg will do.

Note that, if you're driving a high side PMOS, your driver needs to be "hanging" from VCC, and you actually need a negative regulator to supply its VSS, relative to VCC.

I'm not sure what else you'd be doing; PMOS with a ground referenced (positive) driver doesn't make much sense.  Maybe if it's cap-coupled, with a DC restore circuit?  That can be useful for example on synchronous Cuk converters.

Tim

[MarkR42]

I am doing something similar with a N-channel mosfet driver.

If my supply is > 13v, then a LDO regulator will regulate it down to 12v, which is the nominal supply voltage for my gate drivers.

If the supply is <13v, then the LDO will just pass it through (with some amount of drop of course) and the gate drivers will see a lower voltage on their power rail, which is still ok but might not turn the FETs on quite so "hard" leading to slightly higher on-resistance (according to the datasheet) but I think that will be ok.

I expect this will work but it is not absolutely clear; I've seen other circuits do the same thing though.

Are you trying to drive a low side driver with P-channel? Don't you need to give a negative voltage to turn that on?

[T3sl4co1l]

Oh and as for reduced supply -- yes, it will just pass input to output, minus the dropout voltage.  Which is poor for 7805, but proper LDOs are fine.

The two gotchas for LDO selection are:
1. check for ground or ADJ pin current.  Preferably find a plot of Ignd vs. Vin for given Vout and Iout.  Normally, it is low at low voltages, rising to a modest peak (perhaps 2x the stable value) near dropout, then falling to the rated (stable) value for Vin > Vout + Vdropout.  The catch is, some PNP type LDOs didn't handle saturation properly, and could draw 10s of mA in dropout as they vainly fight to keep the output voltage up.  Newer types should be clear of this behavior, and CMOS types should be pretty low current in general.
2. Stable capacitive load.  Older LDOs especially were designed for capacitors with significant ESR (electrolytic and tantalum); they are wholly unsuitable for ceramic bypass capacitors and oscillate madly with them.  Look for a stability region plot, typically showing C and ESR along the axes.  Failing that, look for phrases such as "stable with ceramic capacitors" or "very low ESR"; these are unfortunately less specific, but if they can be believed, it should be fine.

As for gate drivers at low voltages, you can shop around for drivers with specific UVLO (undervoltage lockout) -- they won't turn on until sufficient VCC is present.  Most are around 5V I think, which is pretty marginal for high voltage types, but quite adequate for lower and logic-level types.  I would be quite comfortable with an 8 or 9V threshold.

Mind, they're all made for N-ch, so the default-low state won't exactly be compatible with the PMOS target.

Tim

[drakejest]

For reference the mosfet im using is a https://www.vishay.com/docs/71591/siss63dn.pdf]vishay SISS63DN[/url] , its a bit overkill for my application but it has a super low rds on which would remove the need to place a heatsink on it, im not really using to PWM stuff so i dont mind the bit high gate charge. I am driving it with a microchip https://ww1.microchip.com/downloads/en/DeviceDoc/20002092G.pdf]MCP1416[/url]. again its a bit overkill but it is cheap and i can interface with it directly with 3.3v.


So a high input to the driver would spit out Vcc on the gate of the mosfet making Vgs = 0 or "off" and a low input would make the Vgs = 5v (if Vcc was 5v) or "on"

if i were to use a regulator rated for 5v and has an input of 5v, will the regulator be able to deliver the burst current needed to the driver to charge the gate of the mosfet? current i have a 10 Ohm gate resistor

[T3sl4co1l]

How will you arrange a positive regulator to a. regulate with respect to VCC, and b. deliver negative current (current exiting the driver's VSS pin)?

Also, how do you intend to use a 20V MOSFET, on a (up to) 24V supply, without breaking it?

If it doesn't need to be switched quickly, why not use a level shifting circuit instead of a gate driver that is poorly suited to it?

Tim

[drakejest]

Also, how do you intend to use a 20V MOSFET, on a (up to) 24V supply, without breaking it?

that was very bad of me forgetting to check the drain source voltage, So im changing the mosfets to this DMP3007

with this new mosfet i should be able to handle 24v and at the same time i dont even need the regulator anymore as its GS voltage rating is 25v. as for the driver that driver is only upto 18v so i have to change to this

If it doesn't need to be switched quickly, why not use a level shifting circuit instead of a gate driver that is poorly suited to it?

well its nice to have it as an option as its not really that much more of a work (mostly jjust a slight cost increase)


are the parts much better now?

[ajb]

+/-25V is the Absolute Maximum Vgs rating, it may not immediately blow up if you go beyond that but all guarantees in the datasheet are off.  Only having 1V of margin between your nominal supply voltage and the absolute maximum is kind of risky, especially if that 24V comes from somewhere outside of your board.  Supply transients, or just a supply that's a bit higher than nominal, can easily cause your Vgs to go beyond the rating if you don't provide some sort of protection.

You also won't be able to control that MOSFET driver from a logic level output, because it's really just a pair of BJTs in a voltage follower configuration, so it will provide increased current drive but will not provide any voltage gain or level shifting. 

Are you trying to do PWM, or is the MOSFET being used as an on/off switch?  If you're not doing PWM, and don't otherwise need hard switching for some reason, then a very simply level shifter using a low-side transistor to pull the gate down via a resistor and a zener diode between gate and source could be all you need, as attached.  If you are doing PWM, then you need a push-pull drive referenced to the positive supply with proper level shifting.  You could built that up yourself from discrete parts, but an integrated high side switch or an N-channel MOSFET with a proper high-side gate driver would be an easier solution.