EEVblog Electronics Community Forum
Electronics => Projects, Designs, and Technical Stuff => Topic started by: dastructhm on September 05, 2022, 08:35:16 am
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Instead, SWD is used for firmware download and upgrade? JTAG's footprint is too big?
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There are plenty of devices which have a full JTAG interface on the inside. Usually high end industrial stuff, where size and or cost is not a concern. Or communication equipment. If you have something with a lot of microcontrollers or FPGA's than a daisy chained JTAG will have smaller footprint than individual SWD interfaces. And there are smaller JTAG footprints, like 1.27mm pin header.
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SWD is very much only an ARM thing.
JTAG is used for a lot more than just ARM CPUs/SoCs. E.g. all FPGAs and CPLDs use JTAG for programming and boundary scan, RISC-V MCUs use JTAG, etc.
JTAG only needs 6 signals, 5 if you skip the optional TRST. There is absolutely no reason why one would have to use the large 20pin 0.1" header for it.
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If you mean this in the context of assembling the bulky ~0.1" or so pin header on the actual board, no, that's often a thing that lasts only through the early-ish prototyping stage. Depending on the size constraints of the product, there might be some downsized headers/adapters to begin with. Mass produced boards obviously still have these signals routed should your product be in the need of JTAG (boundary scan testing, some level of programming, or both), but the relevant equipment just interfaces via test points in some bed of nails thingy.
For upgrading the FW, in the industries I have any experience the JTAG interface was not really a thing for that. Often the company&product specific boot loaders etc. handle this over whatever physical interfaces there are. Manufacturers typically want to restrict / completely eliminate any access over the JTAG interface once their product goes out to the wild world, don't they?
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I worked for a Spanish company about ten years ago. Their product has a full size JTAG connector and uses the ULINK Pro adapter to program and debug LPC series ARM MCUs.
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A lot of new ARM-based devices don't even have JTAG, so there is no option. SWD is generally better anyway when there is an option. In some cases JTAG is left as a rudimentary thing for boundary sacan for the board testing, but has no debug capabilities.
While SWD is technically ARM-only thing, there are RISC-V products from WCH that use SWD. I have not seen how well it is implemented, but there is no real reason why it would not work.
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A lot of new ARM-based devices don't even have JTAG, so there is no option. SWD is generally better anyway when there is an option. In some cases JTAG is left as a rudimentary thing for boundary sacan for the board testing, but has no debug capabilities.
While SWD is technically ARM-only thing, there are RISC-V products from WCH that use SWD. I have not seen how well it is implemented, but there is no real reason why it would not work.
Well, I would assume that when someone is building RISC-V chips they may not want to pay license fees to ARM for the debug interface on them. JTAG doesn't need that, AFAIK. The Sifive RISC-V chips don't support SWD, only JTAG.
Also plenty of other MCUs in larger packages support JTAG, e.g. some AVRs, Intel '51s, some PICs, usually in addition to some sort of proprietary programming/debug interface ...