Is the waveform of this wave peak detection circuit normal?

[daisizhou]

Please refer to the attached drawings for the circuit schematic.500kHZ sinusoidal signal 224mv signal I input in RF INPUT,At TP7 I measure a sine waveform,Next, the upper half is the positive peak detection circuit, and the lower half is the negative peak detection circuit.
But I'm testing on TP8 to get a superimposed sinusoidal signal。I don't know if this is normal.
I tested again at TP9 and got a negative peak waveform above the horizontal baseline, again I don't know if this is normal

Please let me know if you know the correct waveform, thanks
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Retested TP8 signal, now TP8 is back to normal,But TP9 is still above the X axis. Is TP9 lower than the X axis when normal?

[moffy]

The Devil as they say is in the detail. You need to say what types the op amps are, the diodes and the transistors. Parasitic capacitance and leakage currents can play a significant part in the signal integrity, also what power supplies are you using for the op amps?

[daisizhou]

U21:AD844AN           (D1、D2、D3、D4、D5、D6  D8、D9、D10、D11、D12、D13):LL4148
Q1, Q2:547BNPN       Q4, Q5:560BPNP
The power supply uses the transformer 220V AC input, 2-way AC9V output。First pass through U1: LM317T comes out +12V, -12V, -7V，
+12V then passes through U18: LM2941T to form +9V，-12V then goes through U20: LM2991T to form -9V
The actual measurement is in the circuit +9V=+8.467V, -9V=-8.583V

[moffy]

Did a quick LTSpice sim of the driving transistor and diode, and your circuit results don't look correct. What is U23 and U22? And with 0v input at the RF input what are the DC voltages at TP7,8,9,10,11? That will give us some idea of the DC bias voltages.

[daisizhou]

U22=U23=LF412CN
When 0v is input at the RF input, TP7=0.07mv
TP8=102.53mv, TP9=-108.53mv,
TP10=77.67mv, TP11= 82.14mv
The following are the waveforms of TP8 and TP9 that I recently tested. It seems that TP8 is normal, but TP9 is still higher than the X axis.

[Geek459]

Hi , what is s5 and s7 in the schematic?

[fourfathom]

Looking at TP8:  Assuming ideal components, R66 (10M) and C27 (1n) have a time constant of 10 ms.  Unless D1 is extremely leaky or has a huge capacitance, or the follower U23 has a ridiculously low input impedance, you should not be seeing the signal you show at TP8.  I would start troubleshooting there, look for wiring errors or bad components.  Is the capacitor truly 1nF?  Perhaps tack a bigger cap across C27 and see what happens?

[moffy]

The DC TP voltages look reasonable. What fourfathom suggests also sounds like good advice.

[daisizhou]

In the schematic diagram, s4, s5, s6, and s7 are connected to the input pins of the analog switch chip, and finally connected to the analog-to-digital conversion chip

[moffy]

Analogue switch chips, in my experience, tend to fail frequently. It provides a common point of failure for TP8,9 can you desolder/disconnect it?

[daisizhou]

The picture content in the attachment is the functional description of the circuit

[daisizhou]

The picture content in the attachment is the functional description of the circuit。
I can disconnect the analog switch chip, in short, disconnect s4, s5, s6, s7 and the circuit, right? Then re-grab the waveform?

[fourfathom]

Don't worry about the analog switches for now.  The problem is obvious at TP8, which should be essentially a DC value equal to the positive peak of the input signal, and TP9 should be DC at the negative peak level.  The signals at TP8 and TP9 are both bad.  Fix that and then move on.

[daisizhou]

Where should I start checking, where should I start?Is TP8 also wrong?
It looks more like the overall upward shift of the TP9 waveform is too large
I simulated the correct waveforms for TP8 and TP9. Is the correct waveform the same as what I have drawn in the attached image?

[daisizhou]

Instead of repairing the board, I recreated a new PCB board based on this schematic.Found this problem when debugging circuit functions

[daisizhou]

Brief description: My TP9 circuit peak voltage is about 270mv high.Is my description correct?

[moffy]

This is roughly what you should be looking for across the capture capacitor:

[fourfathom]

Where should I start checking, where should I start?Is TP8 also wrong?
It looks more like the overall upward shift of the TP9 waveform is too large
I simulated the correct waveforms for TP8 and TP9. Is the correct waveform the same as what I have drawn in the attached image?

No your sketch is not correct. 

The signal at TP8 should be close to a DC value, decaying with a 1 ms RC time constant between input signal peaks.  Here is a LTspice schematic and plot of your circuit between TP7 and TP8 showing how it should be working.  There is a 400mV offset in the output of my simulation, but that can probably be fixed by adjusting the standing current in the PNP transistor and the diodes.  I haven't looked into that because your results are grossly in error, and minor offsets aren't yet relevant. 

By the way, resistors R59 and R70 in your first schematic really serve no purpose and could be eliminated.  If you need the gain-trim you can get it elsewhere.

[daisizhou]

I redo the online measurement,The yellow curve represents the (TP8) positive peak curve, and the blue curve represents the (TP9) negative peak curve
200mvpp level, there is little difference between TP8 and TP9.But at 1VppTP8 and TP9 the difference almost doubles
I do not know why

[daisizhou]

Sir, as for the TP8 DC signal you mentioned, I think mine is the real circuit.
The state simulated by software is an ideal state, without other interference conditions, a DC signal may come out, but there is interference in reality.I drew a picture of my simulation, you see if it makes sense.

[daisizhou]

Don't know the specific role of R59 and R70 in the circuit,Because I made the PCB circuit board 1:1.
It now appears that the gain value for the negative peak of TP9 may need to be adjusted since at 1VP level the voltage is twice that of TP8
I also don't know what the exact gain this circuit was originally designed for.
I think either reduce the negative peak gain or increase the positive peak gain. But first we need to know what the exact gain was originally designed for

[Geek459]

In the description file "fucuon.jpg" at the end is written:"The peak detector ran be reset by short-circuiting C27 and C28 via octal analog switch U24",i think it is useful to analize how this interact with a part of schematic circuit that you have placed.Probably , there's a mcu or a logic that manage all sequences ,without this information is so difficult assert if work good or not.

[daisizhou]

Yes U24--- DG485DJ (Octal Analog Switch Array)LTC 1272- 5CCN------AiD converter 12 bit 250 kHz at the back，Finally, the microprocessor chip

[daisizhou]

I rechecked the hFE of Q1, Q2 and Q4, Q5 and tried to make their hFE the same
Why TP9 is 1/3 times bigger than TP8 at 1VP, I don't know。At 200mVp, TP9 and TP8 measurements are almost identical

[fourfathom]

Sir, as for the TP8 DC signal you mentioned, I think mine is the real circuit.
The state simulated by software is an ideal state, without other interference conditions, a DC signal may come out, but there is interference in reality.I drew a picture of my simulation, you see if it makes sense.

If your hand-drawn green trace is supposed to be the "real world" version of the green trace (at TP8) I show in my simulation, then you have got something seriously wrong.  Look at your circuit: Is there anything at the TP8 node that should cause the signal to rapidly discharge towards zero?  The relevant components are D1, R66, and C7.  What would be the source of your "interference in reality"?

Do you have an "octal analog switch" connected to "S5"?  If that is the case then having the switch enabled could give you the voltage differences and rapid discharge you are seeing.  If so, disconnect the switch from S5 (and S7), or turn it off.  Check the power supply and logic levels at the switch.