Analysis of Keithley 2400 SMU output amplifier

[Yansi]

Hello,

just out of curiosity, have poked around and looked at various diy SMU builds. Then I was like, can I find a Keithley 2400 schematic? Interested to see how the ranging was done. But the answer seems no, there seem to be no full service manual with schematic avaialable, but at least we have the following (bug infested) drawing I've found on https://xdevs.com/fix/kei2400/



After correcting the likely purpose made infestation of errors and mistakes, we get something like this:



I have added ref. designators in green so we can specify better what are we talking about. Assuming the structure must be symmetrical, I have marked only the positive side.

My observations so far:

• Output stage is deep in class B, having 2*Vbe window of doing nothing at the opamps output.
• Power stage is also in class G, diode D1 is what is switching in the lower rail.
• The triangle symbol with letter F is the Floating ground. Supply voltages suffixed F likely those floating with the output positive force terminal.
• Mosfet output transistors are always doubled, likely just to split the power dissipated.
• R4, Q4, Q5 is likely just a hard current limit protection for the higher range (±200V). Low range hard limit is given just by the opamps maximum output voltage vs R8.
• Opamp is connected weird, I probably still miss something. I guess its power supply is "boot strapped" from Q2 to limit maximum output swing to what makes sense, but I do not understand C1. Rin, Rfb is likely the overall voltage feedback (terminal "O" is the negative force output terminal); the upper input terminal of the opamp is then likely the inverting one. I guess C1 was drawn also purposely incorrect, would expect it to go to the inverting node. This way it is just loading the output capacitively. Am I right?

That is probably the obvious. Now what might the expected zener voltages for ZD1, ZD2 and values for the gate resistor dividers (R2, R3, R5, R6)?
Looks like there may be also missing some resistor in between cathode of D2 and collector of Q5.

Thank you for any insight, am just trying to understand it better. I will try to maybe even try cobble some LTspice sim. Any further comments welcome.

Y.

[Doctorandus_P]

There are at least two DIY SMU's which are based on the same topology. And those are available complete with full schematics, circuit description, simulation results and more. So start with the Dave Erickson version below.

https://djerickson.com/diy_smu/

Mr Erickson also has a link to the service manual of an older SMU (Keithley 237) and that one does have full schematic.

That said, I'd rather buy a second hand 237 then a 2400, because the service manual with schematic is available for the older one.

Also:
The output stage for the 2400 may look complicated, but apart from the output stage itself (Opamp + Q518 and Q521) it is just some automated switching between different voltage rails. And probably a bit of fiddling to divide the total power dissipation over multiple semiconductors.

(Maybe there is some inherent current limiting in the high voltage stages too?)

But whatever, the block schematic is not very interesting. It starts getting really interesting when you study all the details of the 237 and how they get a good accuracy and precision from nA to a few A.

And of course the circuitry to suppress glitches and other nasty stuff from reaching the output, and much more.

[Yansi]

That is a very different (and much simpler) output stage, mentioned inspired from Keithley 236, much older instrument. 236 has a single range of ±100V.

[Doctorandus_P]

I think the 237 had an option for a 1000V output.

[jbb]

I’m pretty sure that those series stacks (Q1, Q2, Q3) and (Q4, Q6, Q7) are about voltage sharing.

I guess ZD1 is used to indirectly set the VCE across Q1 (less the VGS  of Q2 and voltage drop on R8). Perhaps there should be a connection dot near R1 and R2 so that +15VF pushes some operating current into ZD1?

R2 and R3 are I guess equal values to divide voltage across Q2 and Q3. They could be quite large because the DC current flow into C3, C4 and Q3 gate will be very small. I guess C3 and C4 are likewise equal values and a few times larger than the CGS + CDG capacitance of Q3.

Similar situation for the Q4, Q6, Q7 stack I guess.

As it comes to R8: it might actually be a set of several resistors with range switches (see also https://www.djerickson.com/diy_smu/)


Stuff you may already know…

In principle you could use one big BJT instead,  but transistors tend to have reduced power handling as VCE goes up  (I think it’s called second breakdown?). This is shown on Safe Operating Area plots. Similar situation with MOSFETs too I think.

The series stack arrangement seems to use the BJT as the control device (it’s got a much more stable VBE threshold than a MOSFET VGS threshold). The MOSFETs split up and share the voltage stress (and power dissipation).

I guess the class G arrangement helps a lot in source mode, but to a lesser extent in sink mode.

[Kleinstein]

The class G part also help when sinking: the transistors only have to dissipate the external voltage + 36 V. This is still a lot, but less than with the full supply. The sinking case is a reason, why there are alread Q2 and Q3 as 2 high voltage MOSFETs with only 36 V via D1.

[RoGeorge]

In the schematic of Keithley 237, the output module is powered with +1200V and -1200V.

There were a few SMU threads on EEVblog, random search result (with pics from inside the 236):
https://www.eevblog.com/forum/testgear/keitley-236-teardown-and-review/

[Doctorandus_P]

As drawn the output stage of the 2400 does not make much sense. For example R5, R6 Q6 and Q7 imply load sharing, but I haven't seen a FET yet that can tolerate over 30V on it's gate. And for low output current Q518, Q521 are off, and all output current is delivered by ZD1 and through R7, so there is no "dead band" as with a pure Class B.

There are just too many details omitted from that diagram to be of much use.

[Hydron]

Note that the K23(6/7/8) have BJTs wired as zeners (reverse biased base-emitter) across the mosfet gates. I suspect there's something similar here - the diagram just misses that as well as many other details (e.g. there's probably also local current limiting).

[Kleinstein]

Essentially all modern MOSFETs have an internal zener diodes to protect the gate.