A fast 5v/12v unidirectional level shifter

[robertbaruch]

At least, I think it'll work. I had to respin the first board because I screwed up the pinout of one of the dual MOSFETs. I put one together and promptly made a burnt offering to the electron gods. Still waiting for revision B to come back.

[github link]

[Zero999]

How fast does it need to be?

It looks quite complex. What's wrong with the HEF4104B or CD4504B?
http://www.nxp.com/documents/data_sheet/HEF4104B.pdf
http://www.ti.com/lit/ds/symlink/cd4504b.pdf

[robertbaruch]

Required translation time is <100ns. Ideal would be <10ns. While the circuit I designed is somewhere in the middle (I won't know by how much until I get the boards), those chips don't approach anywhere near what's needed. I don't want to discourage anyone, though, please keep the suggestions coming. I've looked and looked and came to the conclusion that I had to roll my own.

[jbb]

10ns is really fast!  You could try a MOSFET gate driver chip.

IXYS IX4427NTR.  2 channels in SOIC8. Accepts 3.3V and 5V logic signals, can be powered from 12V.  60ns delay + 10ns rise. 1.5A peak output current
Infineon 2EDN8524FXTMA1. Similar, but 17ns delay + 5ns rise.  5A peak output.

Either option will need proper decoupling caps so it doesn't ring hugely.  The Infineon will spit out lots of noise if mishandled...

You've got to add a series resistor to the output because they're high speed drivers and can literally throw out Amps.  Also be aware that the current ratings are for SHORT TERM only.  They are not suitable for relay drivers etc.

Good luck

[robertbaruch]

OoooOOOOooooh! That Infineon chip looks awesome! I think I can certainly use it for the 5v->12v and 12v->5v conversion. I'm pretty sure that the pullup resistors on the inputs will not disrupt the circuits I'm working with, which typically have an output impedance of 50k or less.

Because there's no Hi-Z state, I'll still have to use that switch that's in the middle of my board. But this does get me down from 16 dual-MOSFETs to 2 chips. Plus a few series resistors on the outputs.

I'ma order a few RIGHT NOW for basic prototyping.

[jbb]

For the 12V->5V level conversion you can probably use a good old-fashioned voltage divider.

Quad channel MOSFET gate drivers are available - but you may not find the same speed options. As evb149 says, a comparator might be a better bet (they are definitely available in quads...).

[exmadscientist]

A comparator was be my first thought as well, but 10ns is pretty fast, especially for a 12 V signal. I'd be wary of open-drain outputs at such speeds; probably less trouble to just go with push-pull. Looking around there don't seem to be many comparators that meet both the speed and voltage requirements. A gate driver looks like a pretty good choice here.

[jbb]

Because there's no Hi-Z state, I'll still have to use that switch that's in the middle of my board. But this does get me down from 16 dual-MOSFETs to 2 chips. Plus a few series resistors on the outputs.

Hang on a minute... you need Z states?  That Infineon beast can switch 12V in 5ns.  That's 60kV/us and probably enough to screw up the DG403. Or at least it's asking for weird ringing signals! 

I think you should reconsider your system architecture at this point and make sure you're solving the right problem.

[technix]

Schottky diodes like 1N5711? You can scale the pull-up resistor so it meets your timing requirements. Schottky diodes works up into the GHz range.

[robertbaruch]

Hang on a minute... you need Z states?  That Infineon beast can switch 12V in 5ns.  That's 60kV/us and probably enough to screw up the DG403. Or at least it's asking for weird ringing signals! 

Well, I probably should have said that I'm not switching to and from hi-z quickly. The 10ns refers to the signal that passes through the switch.

I don't know that 60kV/usec is so scary. I'm measuring a 1 MHz signal from an NXP (or whatever the hell they're called now) micro that uses 3v3 logic. Rise time is about 5ns. That's 16.5kV/us. Sounds scary, but it isn't.

Also, I'm not requiring high current. The DG403 can take at most 100mA (pulsed) on its terminals. So for transients, I calculate that if I want to output a 12v signal on one terminal that is currently experiencing 0v on the other terminal, the instantaneous voltage drop across the terminals is 12v, so I'd need a 120 ohm series resistor. The steady-state current I need is on the order of 1mA, so the voltage drop caused by the series resistor is 120mV, which is fine for me -- 12v on one terminal, 11.88 on the other.

Here's my modified schematic.

[robertbaruch]

So I got some 2EDN7524F gate driver chips to just validate that they work the way I think they do. And they do.

Here is a horrible breadboard circuit. I gave it a square wave 5V 500kHz input from my Siglent function generator, and measured the output at 12V 500kHz as expected.

There was also the expected ringing. This could be anything -- not enough capacitance across power, too much inductance all over the place, the oscilloscope probes themselves. What worries me, though, is that given there is ringing, and a significant amount of it, should I protect the outputs (along with the circuit receiving this signal) with some 0.3v forward-voltage Schottky diodes? The datasheet says that the outputs should not exceed VDD+0.3v and GND-0.3v (section 5.1). If there's any ringing, I'd expect it to exceed this. However, there's a note in the datasheet on those limits: "Voltage spikes resulting from reverse current peaks are allowed." I'm not sure what that means or if it applies in this case.

[jbb]

Hi Robert

Good post there.  In the 'scope waveforms I can see some issues.  The breadboard will be making everything worse.

• The ringing.  This looks to be around 3MHz, and is quite possibly due to layout on the breadboard.  You can investigate this a bit by probing the positive supply rail of the 2EDN7524F.  If the ringing is there too, you have power supply problem.
  
  • Try making the leads on that decoupling cap as short as possible, e.g. by cutting them right down and soldering them to the breakout board pins directly.
  • I assume it's a 100nF film cap, which is a good start.  Also add something in the 1uF range in parallel.
  • Also try twisting the +12V and 0V supply leads together (reduces the area within the loop, which reduces inductance).
• The high speed spikes at the edges of the switching waveform.  Have you adjusted your scope to get a good look at these?  For this screen capture, it looks like you have -4V overshoot following the high-low transition.  This is huge and could be destructive.  So if you're laying out a board, do leave room for some Schottkys to try to clamp that.  And a series resistor.

However, there are two extra factors to consider.

• You should look at the rise and fall times of the output, and check that your scope is fast enough (i.e. has enough analog bandwidth).  If the edges are super-fast (which they are) you can end up measuring the 'scope performance rather than the signal itself.*
• You appear to be using the flying ground lead on your 'scope probe.  This is inadvisable because the long wire (yes, 100mm is long at these frequencies) adds inductance which a) operates as a low pass filter and b) can cause ringing when combined with the probe capacitance.  You should use one of the little springy earth connection doodads; they make a huge difference.

Welcome to high-speed design.

Cheers
jbb

* This is why I'm OK with having a 50MHz 'scope.  It's fast enough for debugging the stuff I build at home, and if I wanted to debug high-speed gate drivers I'd have to go to 500MHz or more, which costs $$$$.

[robertbaruch]

Thanks -- to my horror, I discovered that the capacitor was actually 120p. I replaced it with a 100n MLCC and checked the power supply:



Then I replaced the ground lead on the scope probe with a smaller spring thing, and things looked a bit better:



I added a 2.2u electrolytic (pretty much all I had in the 1u range), minimal effect. I also twisted the power supply leads, no effect.

Then I checked the output again. The positive edge is much better, but still exceeds 12.3v.



The negative edge has not improved.



Now, the scope I'm using is a 50 MHz scope with 1 GSa/sec. I'm not sure if that means the analog bandwidth is 1 GHz.

As an experiment, I set up the function generator to output 12V 500kHz and measured that directly with the scope. The rise time shows as 6.4 ns. This is certainly slower than the rise time of the chip output (which appears to be 4.8 ns).

Next, I added a 1.2k resistor in series from the output to the scope. This gave a slower rise/fall time, and eliminated the ringing as expected.




A rise time of 50 nsec does limit the usability to about 20 MHz, which I am willing to live with. In the actual circuit, I'll be using lower resistance -- 120 ohms to provide the maximum 100mA to the switch IC -- which may help things. I tried a 470 ohm resistor also, which knocked the rise time down to 25 ns and the fall time to 10 ns but with a short bounce to 2v before settling down at 20 ns.

Overall, I'm pretty happy with this. However, I am now not certain if I will need Schottkys (these, for example) on the output. They will certainly add capacitance and thus transition time.

[jbb]

Hi

Glad things are improving.  Hopefully that supply ripple can be tamed with a tighter layout on PCB. (Ground planes are good!)

There's a very rough rule of thumb that relates the bandwidth of a signal to the rise time. (Refer http://www.edn.com/electronics-blogs/all-aboard-/4424573/Rule-of-Thumb--1--The-bandwidth-of-a-signal-from-its-rise-time)

BW(GHz) = 0.35 / Tr(ns)

You measured a fall time of 4.8ns, which is approx. 73 MHz by this formula.  As this is higher than the rating of your 'scope, it's likely that what you really measured was the input stage of your 'scope.

Also, when you added the series resistance, you made a low pass filter with your 'scope probe's load capacitance Cprobe (often around 10pF) and the stray breadboard capacitance Cs.  Assuming Cprobe + Cs ~ 50pF, you get an RC filter with a time constant of ~ 50ns, which agrees with the measurement. So the performance will definitely change with circuit layout.  Please also note that the high speed ringing is probably still present at the output node of the gate driver, and the RC filter is hiding it from you.

I would encourage you to - as a minimum - add footprints for Schottky clamp diodes. You don't have to fit them.

When you add the DG403 to the situation, it will have stray capacitance and a non-linear resistance.  The internal transistors may also not work right when subject to these large transients.

[MarkF]

Now, the scope I'm using is a 50 MHz scope with 1 GSa/sec. I'm not sure if that means the analog bandwidth is 1 GHz.

Measured bandwidth of Rigol DS1000Z scopes:
  DS1074Z = 90 MHz
  DS1104Z = 125MHz
No one has measured the actual bandwidth of the DS1054Z that I know of. I would guess it is around 70 MHz.

[robertbaruch]

Okay, I will definitely add some Schottkys. Yay, another board respin :/

I guess what I don't understand at this point is where the gate driver ringing is coming from. I thought it was due to some parasitic LCR tank induced by the breadboard and wires. My PCB has four layers (signal, +12v, +5v, ground). I tried as much as possible to route signals such that they travel above unbroken power to reduce loop inductance. So my thought was that the ringing would be minimized on the PCB -- the breadboard version is a sort of upper bound.

Here is the board I put together two weeks ago. I show only the signal and ground planes here. I may have made a mistake in routing jumps through the ground plane rather than another power plane. If you spot anything that's a really bad idea, I'd appreciate it being pointed out! The schematic is on github.

Perhaps I should take the Fedevel high-speed PCB layout course. I've been hesitant because I use Kicad while Fedevel uses Altium, which I don't have and don't want...