Author Topic: JFET Buffer Design Issues  (Read 2623 times)

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Offline madwolfeTopic starter

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JFET Buffer Design Issues
« on: November 13, 2019, 09:34:08 am »
I'm trying to design a high impedance buffer that will go between a DC voltage (between -300mV and 300mV) and an ADC and prevent the ADC affecting the DC voltage (a pH sensor). I would prefer to not have to deal with negative voltages so I'm aiming to offset the pH sensor's voltage.

I'm trying to design a simulation of it using LTSpice and I'm getting an issue where there seems to be some gain and/or low pass filtering on the output. I've tried changing around various things but I'm still getting the issue. When I supply the buffer with +-5V and remove the offset to the voltage source, it buffers fine. I've attached an image of my setup, any insight would be very much appreciated, I feel like it's something quite basic that I'm missing.
 

Offline madwolfeTopic starter

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Re: JFET Buffer Design Issues
« Reply #1 on: November 13, 2019, 09:42:38 am »
That's silly of me - I just double checked what the input voltage range was and it looks like the ADA4610 is dual supply only  :palm:.

However, if I configure the offset to be +5V and the supply to be 10V, it works fine. Lesson learnt: read the datasheet properly.
 

Offline TheHolyHorse

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Re: JFET Buffer Design Issues
« Reply #2 on: November 14, 2019, 07:01:27 am »
That's silly of me - I just double checked what the input voltage range was and it looks like the ADA4610 is dual supply only  :palm:.

However, if I configure the offset to be +5V and the supply to be 10V, it works fine. Lesson learnt: read the datasheet properly.

You can run it from a single supply just fine just make sure you're within the common mode voltage range.

Two 12V sources in series is exactly the same as one 24V source. So dual supply only isn't really a thing.

You might still want 2 supplies tho, depending on what you're doing.
 

Offline madwolfeTopic starter

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Re: JFET Buffer Design Issues
« Reply #3 on: November 14, 2019, 02:01:49 pm »
That's silly of me - I just double checked what the input voltage range was and it looks like the ADA4610 is dual supply only  :palm:.

However, if I configure the offset to be +5V and the supply to be 10V, it works fine. Lesson learnt: read the datasheet properly.

You can run it from a single supply just fine just make sure you're within the common mode voltage range.

Two 12V sources in series is exactly the same as one 24V source. So dual supply only isn't really a thing.

You might still want 2 supplies tho, depending on what you're doing.

Very true, but I'm stuck with using a 5V supply so I would need a +-2.5V opamp which is a bit more limiting. I've found the TL092 or TL2072, both of which seem to fit my buffer requirements ok and are good for a 5v single sided supply. I'm then using a MCP1501 to offset the input voltage to make it positive.

That being said, my aim is to provide a high input impedance reading with an ADC, how does having a series voltage reference affect the impedance as seen by the voltage-generating sensor?
 

Offline SiliconWizard

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Re: JFET Buffer Design Issues
« Reply #4 on: November 14, 2019, 03:22:27 pm »
You could consider something like the OPA140? http://www.ti.com/product/OPA140
 

Offline madwolfeTopic starter

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Re: JFET Buffer Design Issues
« Reply #5 on: November 15, 2019, 10:25:43 am »
You could consider something like the OPA140? http://www.ti.com/product/OPA140

At some stage I might be needing to have two ADC inputs buffered and the OPA2140 is a bit more expensive than the ones I'm considering. Also I don't need a high slew rate or bandwidth, because all the signals should be pretty close to DC.

Thanks for the suggestion though!
 

Online Kleinstein

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Re: JFET Buffer Design Issues
« Reply #6 on: November 15, 2019, 10:59:21 am »
The OPA140 and related (OPA145, OPA141, OPA1641) are interesting in some cases as they are low noise and have an input common mode to the negative supply. However the upper limit is more like 3 V from the rail.

Depending on the frequency range of interest one could also consider an AZ amplifier like AD8551, max4238 or similar. There are quite a few rail to rail 5 V AZ OPs to chose from.
 

Offline madwolfeTopic starter

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Re: JFET Buffer Design Issues
« Reply #7 on: November 15, 2019, 01:11:20 pm »
The OPA140 and related (OPA145, OPA141, OPA1641) are interesting in some cases as they are low noise and have an input common mode to the negative supply. However the upper limit is more like 3 V from the rail.

Depending on the frequency range of interest one could also consider an AZ amplifier like AD8551, max4238 or similar. There are quite a few rail to rail 5 V AZ OPs to chose from.

Good point.
What do you mean by AZ amplifier? I've never heard the term and Google didn't help.

Cheers
 

Online Kleinstein

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Re: JFET Buffer Design Issues
« Reply #8 on: November 15, 2019, 01:41:09 pm »
The AZ amplifiers are also called zero offset amplifiers, either as chopper stabilized or classical sampling auto zero. Quite a few of the modern types are rail to rail for 5 V supply. Different from normal rail to rail OPs there is no significant cross over distortion. 
 

Offline madwolfeTopic starter

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Re: JFET Buffer Design Issues
« Reply #9 on: November 15, 2019, 04:10:32 pm »
The AZ amplifiers are also called zero offset amplifiers, either as chopper stabilized or classical sampling auto zero. Quite a few of the modern types are rail to rail for 5 V supply. Different from normal rail to rail OPs there is no significant cross over distortion.
Ah ok, that makes sense. I'll consider them, they seem have a very low bias current.
 

Online Kleinstein

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Re: JFET Buffer Design Issues
« Reply #10 on: November 15, 2019, 04:54:27 pm »
A PH sensor likes really low bias current, but usually no need for sub µV stability. There are a few Az OP (e.g. max4238, LTC2050), that may be suitable, but not all. The lower noise ones tend to have more bias, up to the > 100 pA range.

A precision CMOS OP (e.g. lmc6081) would be an option too: less bias, but more drift and low frequency noise.
 

Offline madwolfeTopic starter

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Re: JFET Buffer Design Issues
« Reply #11 on: November 19, 2019, 12:54:05 pm »
A PH sensor likes really low bias current, but usually no need for sub µV stability. There are a few Az OP (e.g. max4238, LTC2050), that may be suitable, but not all. The lower noise ones tend to have more bias, up to the > 100 pA range.

A precision CMOS OP (e.g. lmc6081) would be an option too: less bias, but more drift and low frequency noise.
Great, thanks for that. I was going to use a dual opamp because I want to supply a buffered offset voltage to the pH sensor to bring it up to 1+-0.4V, so that I can read it unipolar but I think I'll just use two opamps then, because the offset voltage buffer doesn't really have the same requirements as pH reading.

Cheers
 

Offline AE7OO

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Re: JFET Buffer Design Issues
« Reply #12 on: November 19, 2019, 01:29:32 pm »
Greetings,

Just make sure your sensor can handle any DC you pass it's way.  While it might have been cheap sensors, my nephew(who likes electronics AND plants) managed to destroy 2 fleabay specials, before I pointed out the maximum signal parameters,  did NOT include an input that was biased to 5V/2.  I'm still trying to teach him that paying attention to detail helps in getting stuff working the first time.  >:D
 

Offline madwolfeTopic starter

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Re: JFET Buffer Design Issues
« Reply #13 on: November 19, 2019, 03:21:27 pm »
Greetings,

Just make sure your sensor can handle any DC you pass it's way.  While it might have been cheap sensors, my nephew(who likes electronics AND plants) managed to destroy 2 fleabay specials, before I pointed out the maximum signal parameters,  did NOT include an input that was biased to 5V/2.  I'm still trying to teach him that paying attention to detail helps in getting stuff working the first time.  >:D
It can't handle much DC at all but, as I understand, it shouldn't be getting much. I've attached a screenshot of how I've done the bias circuitry. It is basically just a method to 'shift' up the reference voltage that the pH sensor generates by 1.024v.

I'm pretty sure this shouldn't exceed the limits of the sensor. That being said, I should probably put a RC filter on the offset voltage to reduce the inrush current when it turns on. It might not be much but it could make a difference maybe.
 

Online Kleinstein

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Re: JFET Buffer Design Issues
« Reply #14 on: November 19, 2019, 04:07:36 pm »
PH sensors don't need ultimate precision, but a really low bias helps. So the low bias CMOS versions are preferred . They are usually also avialable as duals (e.g. LMC6082).

A virtual ground like some 1 V from ground can be a good idea. However no need to get an accurate value, especially if the ADC has a differential input or one can measure both side.
 

Offline madwolfeTopic starter

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Re: JFET Buffer Design Issues
« Reply #15 on: November 21, 2019, 09:24:51 am »
PH sensors don't need ultimate precision, but a really low bias helps. So the low bias CMOS versions are preferred . They are usually also avialable as duals (e.g. LMC6082).

A virtual ground like some 1 V from ground can be a good idea. However no need to get an accurate value, especially if the ADC has a differential input or one can measure both side.
Ooo yeah, I like the look of the LMC6082, that 10fA bias and offset current is pretty great. Thanks for that.

Finding the ideal component is one of the hardest parts of design I find.
 


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