is it possible to spot the "need" for a tank capacitor with an oscilloscope?

[k8943]

If a circuit is going to require a local tank or reservoir capacitor to smooth out the power distribution, will it be possible to spot the "need" by monitoring the voltage at that point in the circuit with an oscilloscope? In the expectation of being able to trigger off a voltage drop when a component suddenly draws more energy?

[T3sl4co1l]

If it "needs" one, it will be evident in the operational characteristics of the overall thing -- say, an audio amp with excessive hum, or too much jitter in a precision digital circuit.

All you need to do, is work backwards from the spec, through the PSRR, voltage range, etc. of the components used, and determine the supply ripple acceptable at each point.  Then compare that to the current draw and impedance of the supply network, and that will tell you if you need capacitance somewhere.

Tim

[k8943]

Thanks Tim.

I'll do some reading and figure out how to do the calculations you suggest.

So, if when debugging a circuit, one wonders whether a subsection might be a bit borderline on the capacitor front, measuring the voltage with the scope trigger set to catch drops is not a useful approach?

[T3sl4co1l]

Outside of design:

You are merely verifying operation.  You'd have to analyze the design* to know how much ripple is intended or acceptable.

*Lord knows, no one ever writes design documentation, even within the hushed confines of NDAs and whatever background data a project might have.  (I've done it only a few times myself, and have yet to see it actually requested for a project.)

So, setting that trigger, measuring what the ripple actually is: not very meaningful in general.

Much easier to guess that the design intent includes component selection, and verify the components.  Namely, look up the capacitors (say) and see what tolerance and ESR they were supposed to be, then measure their value (out of circuit if necessary).  Don't forget to check under suitable conditions, e.g. ESR might be fine at room temperature, but it goes out of spec at high or low temp (minding that the spec is normally several times higher at low temps; more than that would be out of spec).

Tim

[jbb]

Also don’t forget tolerances and ageing (C goes down, ESR goes up), which is very temperature dependent. I guess you could simulate an aged capacitor with a smaller value cap and small series resistor.

Putting your product in a climate chamber and testing in cold and hot conditions can be really good for flushing out bugs.

If using MLCCs, check their capacitance change with DC bias. It’s common for te effective capacitance to halve (or worse) when operating voltage is applied. The manufacturers have this info available but aren’t very loud about it. Note that in-circuit testing will find this.

Ultimately the right way to do it is circuit / system analysis on paper, maybe some simulations, and then physical verification testing.

[T3sl4co1l]

Also don’t forget tolerances and ageing (C goes down, ESR goes up), which is very temperature dependent. I guess you could simulate an aged capacitor with a smaller value cap and small series resistor.

Well, you should always simulate a capacitor with ESR and ESL.

Putting your product in a climate chamber and testing in cold and hot conditions can be really good for flushing out bugs.

Right, again for design verification.  Although some components do develop temperature sensitivity, and you can test this in debugging with freeze spray.

If using MLCCs, check their capacitance change with DC bias. It’s common for te effective capacitance to halve (or worse) when operating voltage is applied. The manufacturers have this info available but aren’t very loud about it. Note that in-circuit testing will find this.

The C(V) curve doesn't change over time (AFAIK), but they do age, meaning the value drops logarithmically over time since last heating (above Curie temperature Tc -- typically this is reached during soldering).  The amount might be 10% in the first month, and another 10% in the next couple years, say, but it could add up for really old (decades?) parts.  Hot air or soldering heat should reset it.

Example:



This was a Z5U ceramic disc in my junk box, 20nF 50V I think.  Unsure if it reached Tc the first time I desoldered it (which would've been, gosh, 10 years ago?) or if its history is even older than that.

Tim

[jh15]

Geeze, now to go down a rabbit hole studying this stuf. S even my 50 yr old junkbox ceramics can't be trusted? Can I cure(ie) them with a heat-gun? Or is it just the newfangled multi-layer crap.

[David Hess]

I have tracked down problems like you suggest.  A DSO with peak detection or set to infinite persistence can record the peak voltages at high bandwidths revealing if there is a problem.  Triggering on various other signals can reveal the cause of any voltage spikes or sags if necessary; for instance triggering on a tri-state enable line could reveal bus contention.

The tricky part is the probing because what matters is the voltage difference between ground and power.  Ground bounce can be just as fatal as power noise relative to ground.  Differential probes are especially useful here.

Ground and Vcc bounce causing false triggering or signal levels is a different problem but no less serious.