Just another DC Load

[Jay_Diddy_B]

Hi,

You can check the time domain too:





Note: I have been playing with the component values.

Jay_Diddy_B

[henmill]

@Jay_Diddy_B,

Thanks for providing the quicker way to find phase margin! This helps immensely with my trial and error circuit design haha.

I'm having some trouble running a transient sim for some reason though. Would you mind providing the settings you used? Can't see them in the screen shots.

I've attached mine for reference. I set V2 to be a square wave, but it's like it stops evaluating after a short time.

EDIT: I think the problem was starting voltage set to 0. If I give it a small value like 10mV, it works as expected. Seeing lots of overshoot and ringing with the values provided, will update when I get something with cleaner edges like your examples.

Thanks!

[henmill]

Hi folks,

After playing with values in the transient simulation, I've come up with a configuration that looks ok both from AC analysis and stepping the current setpoint in the time domain.

But I still have the issue that I don't have the "right" model to match my part. I reached out to Littelfuse last week asking for a model, but I'm not holding my breath that they will provide it.

I optimized values around the IXTH30N60L2, but if I try substituting in the simplified model of my part, the transient became very difficult to get under control and I end up with some way different values compared to using a "real" spice model of the different FETs. I have a feeling the simplified model is just not quite valid for this type of analysis.

So I welcome suggestions from the group: would you recommend using the values found using the IXTH30N60L2 (much higher gate capacitance) and just perform some tests with the real hardware and adjust as necessary?

I'm imagining one test I can try is to set the load current at a few amps, turn on my power supply, and hot plug it in to see if it can settle without oscillating (watching on the scope). I will be wearing safety goggles for this haha.

Since I don't have the pulsed current feature yet, this is one scenario I could feasibly encounter that could cause the system to lose stability.

Anyhow, attached are some sims showing the disparity in component values between the real spice model and the simplified current source model.

edit: I should say for the simplified version showing the phase margin, you can see the gain peaking and in transient with those values, there was massive ringing on the rising edges. I did not get a screenshot but that is the reason for the big change in values in the transient sim that followed.

[Kleinstein]

So far the simulation shows a lot of phase resere and the unity loop gain well in the 90 degree zone. So a very conservative compensation.
There is quite a hefty RC snubber at the output. Normally one would want to get away with higher impedance there, e.g. ideally < 1 µF and more resistance.


To see the effect of different source impedance on can do an AC simulation with an AC source at the output (V3). This would simulate the output impedance / conductance. This would tell how much snubber is really needed.

[henmill]

Thanks Kleinstein.

The reason I have the 1R + 5.7uF snubber is because that is what I have built. I have all these big beefy 1 ohm resistors and due to their size I didn't feel like wiring 2 or more in series. And with simulation I (at least thought) I was getting better results with slightly higher cap values in combination with the 1 ohm.

Do you think it would be better to start with 1R + 1uF and go from there? It is easy for me to remove the 4.7uF cap I have in parallel with a 1uF.

I will add some 2 ohm resistors to my digikey cart to round out my options.

Here is a picture of the snubber with sense resistor (0.2R || 0.2R) as I plan to have it built. I meant to post this with the last reply.

[henmill]

I finally got around to turning this thing on again.

I decided to pick some values and hold my breath and see what happens. Rather than list them out, here is a schematic view showing the nominal values of what I have on the board today:
edit: maybe it goes without saying if you've been reading, but this schematic does not show my actual FET part number.


At a glance, it is functional at least. I didn't have much time tonight but I probed around a bit and ran a couple quick tests.

First, I just wanted to watch the sense node and gate to look for any weirdness. Perhaps I found something of interest, but I'm guessing it might be the ripple from the power supply "under test".

In the waveforms, channel 1 (yellow) is the sense node/Source.

In this waveform, the setup was running at 15V in, 2A. Channel 1 is AC coupled and you can see the sawtooth shape at the sense node. Channel 2 (blue) is the gate. It seemed steady enough, though maybe I should have looked more closely to see if the same frequency is present at the gate. 35mV pk-pk doesn't seem like much, but when a 1A set current should be 100mV, that is quite a deviation. The amplitude seemed about constant as I moved up and down in current.


I decided to get crazy and try a quick "hot plug" test at 10V 1A. In this capture ch1 is the sense node and ch2 is at the Drain. For this test I had the unit running at 10V, 1A. Then I disabled the power supply and unplugged the + wire. Then I turned on the power supply output and plugged it in.


Here are also a couple pictures of the hardware.

Thanks as always for feedback, and if anyone wants to suggest a test plan, I'd welcome it!

[RoGeorge]

Nice build! 

(May I kindly ask you next time to embed inside the text full size pictures, please, and not their thumbnail, because the thumbnail opens in a new tab, so it's bamboozling to go back and forth between the text and the picture tabs.)