Lars DIY GPSDO with Arduino and 1ns resolution TIC

[iMo]

The 200ns p-p jitter comes mostly from ISR latency. It creates only 80uV p-p noise based on my calcs above. That is 50x smaller noise than the ADC noise I would estimate. So I would not be worried about.
The removal of 10Mohm helped to keep the voltage at the 1nF capacitor flat during S&H, that is an improvement.
The 1k reset with a pin will work, it induces some leakage and maybe noise but that needs to be measured somehow.
I think there is nothing to mess with at this stage, make the measurement, do log the data in a .csv file such you may analyze afterwards.

[iMo]

.. I've calculated that, using e.g. the STM32F030's timers to output a PWM, for 16bit resolution I'd end up with a PWM frequency of around 700 Hz and with a low-pass filter with a 0.1Hz cut-off frequency to reach <1mV ripple, while at the same time I'd see a settling time of close to 4 seconds. That's not going to be very responsive.

The MCU based GPSDOs usually work such they set a new DAC voltage in some longer period, like 5minutes or 10minutes, etc. It is expected the OCXOs are stable enough not to be corrected each second.
The XOR analog ones work differently, they are correcting "continuously".

FYI - there was a good long discussion with a lot of experiments on PWM in the Metrology section - https://www.eevblog.com/forum/metrology/lm399-based-10-v-reference/msg2271156/#msg2271156
Btw there is the stm32F334 with 217ps PWM resolution

[Miti]

If anybody is interested, some time ago I tried a real DAC AD5693 instead of PWM and it seems to work well. I didn't try it in real GPSDO though only h1, h65535 and many in between. It should reduce the switching noise a bit.

[thinkfat]

.. I've calculated that, using e.g. the STM32F030's timers to output a PWM, for 16bit resolution I'd end up with a PWM frequency of around 700 Hz and with a low-pass filter with a 0.1Hz cut-off frequency to reach <1mV ripple, while at the same time I'd see a settling time of close to 4 seconds. That's not going to be very responsive.

The MCU based GPSDOs usually work such they set a new DAC voltage in some longer period, like 5minutes or 10minutes, etc. It is expected the OCXOs are stable enough not to be corrected each second.
The XOR analog ones work differently, they are correcting "continuously".

Looking at Lady Heathers plots for DAC and Loop of the two GPSDOs I already have, the control loop adjusts the DAC every second (or every other second)...

Anyway, WIP schematics attached. I'm wondering about a few details, though:
* The layout guidelines for the TDC7200 suggest adding series resistors into the SPI lines. I've provided them, but I won't really need them if the layout is tight and the traces just a couple of millimeters, will I?
* Another recommendation is to have matched length START and STOP inputs. I think that's not relevant in my case, it will just skew the phase of the 10MHz against the 1PPS signal a little bit.
* I'm using a MC7805 for creating an 5V supply for the DAC and the Opamp (VDDA), with an added LC filter. Is that sensible?

[metrologist]

  never mind about this.  Re: ISR discharge. Would it be better to set the pin open at start of the ISR and then leave it low on exit?

The MCU based GPSDOs usually work such they set a new DAC voltage in some longer period, like 5minutes or 10minutes, etc. It is expected the OCXOs are stable enough not to be corrected each second.

I don't know if the code addresses the PPS jitter but it seemed that one could leverage the relative stability of the OCXO to apply a correction. My GPS has a lot of short term jitter and it is cyclic, but it would seem long term timing would be accurate.

[iMo]

1. The layout guidelines for the TDC7200 suggest adding series resistors into the SPI lines. I've provided them, but I won't really need them if the layout is tight and the traces just a couple of millimeters, will I?
2. Another recommendation is to have matched length START and STOP inputs. I think that's not relevant in my case, it will just skew the phase of the 10MHz against the 1PPS signal a little bit.
3. I'm using a MC7805 for creating an 5V supply for the DAC and the Opamp (VDDA), with an added LC filter. Is that sensible?

1. I would let the resistor's there. They limit EMI between those two chips as well (the 22ohm in 500kHz? - nope, the 22ohm should be put in all SPI lines).
2. do it as best as you can.. I would split the "10MHz" via 2xinverters into "10MHz for 390" and "10MHz for 7200".
3. LC filter is ok, even 100nH is rather on the lower side (1-10uH would be better, imho). Add 10-22uF MLCC into VDDA.
7805 - stability - the DAC has got its own 2.5V 2ppm/C Vref, afaik.
Critical are the R6/R7 - their TC. If you use 50ppm/C resistors the TC of the gain could be 100ppm/C easily.
Also doublecheck the TC of the TLC272 input offset (1.8uV/C).. I would create a VDDA1 for the opamp. And from opamp's output an RC low pass, like 100ohm and 10n.

7404 input 10MHz squarer (fed by 1-2Vpp sine) - that is also a critical component (jitter). Such a simple solution does not work well usually.
I would put an inverter into 1PPS as well, but not from the same package as the 10MHz ones (there are 5pin smd 74xx inverters/buffers available).
I would also add a capacitor at the input of the 7805. Also a serial diode into the 24V rail.
Provided your system will take 40mA @5V the power loss at the 7805 will be 0.8W with 24V..
You are missing one important component of the GPSDO - "Locked" LED 

[Miti]

May I have couple of suggestions?

* If you use inverters as buffers, you sine wave would be altered in case you use a sine wave OCXO, and I think a sine OCXO is preferable as it is more spectral clean. I would use high speed comparators.
* Some OCXOs need VC higher than 5V. It would be useful to the option to control the gain and offset of the VC above 5V. I've attached a schematic that I simulated some time ago. If R1/R2 and R7/R8 are trimmers, you can control the gain and offset of VC so your DAC will always work around 32768. And of course you should supply the opamps from 12V. Ignore the opamps that I selected, it was something fast.

[thinkfat]

1. The layout guidelines for the TDC7200 suggest adding series resistors into the SPI lines. I've provided them, but I won't really need them if the layout is tight and the traces just a couple of millimeters, will I?
2. Another recommendation is to have matched length START and STOP inputs. I think that's not relevant in my case, it will just skew the phase of the 10MHz against the 1PPS signal a little bit.
3. I'm using a MC7805 for creating an 5V supply for the DAC and the Opamp (VDDA), with an added LC filter. Is that sensible?

1. I would let the resistor's there. They limit EMI between those two chips as well (the 22ohm in 500kHz? - nope, the 22ohm should be put in all SPI lines).
2. do it as best as you can.. I would split the "10MHz" via 2xinverters into "10MHz for 390" and "10MHz for 7200".
3. LC filter is ok, even 100nH is rather on the lower side (1-10uH would be better, imho). Add 10-22uF MLCC into VDDA.
7805 - stability - the DAC has got its own 2.5V 2ppm/C Vref, afaik.
Critical are the R6/R7 - their TC. If you use 50ppm/C resistors the TC of the gain could be 100ppm/C easily.
Also doublecheck the TC of the TLC272 input offset (1.8uV/C).. I would create a VDDA1 for the opamp. And from opamp's output an RC low pass, like 100ohm and 10n.

7404 input 10MHz squarer (fed by 1-2Vpp sine) - that is also a critical component (jitter). Such a simple solution does not work well usually.
I would put an inverter into 1PPS as well, but not from the same package as the 10MHz ones (there are 5pin smd 74xx inverters/buffers available).
I would also add a capacitor at the input of the 7805. Also a serial diode into the 24V rail.
Provided your system will take 40mA @5V the power loss at the 7805 will be 0.8W with 24V..
You are missing one important component of the GPSDO - "Locked" LED 

I added the resistors in the start/stop signals because the sample layout from the datasheet has them, I guess I'll keep them as well, I can always replace them with a 0R bridge.

Regarding the input sine-to-square, I took that circuit from the LPRO-101 user guide. They use a 74AC04, however. There's also a variant with a 1:1 voltage divider at the input of the inverter and without the feedback resistor for self balancing, would that be better? The data they provide for phase noise seem ok, < -150dBc @100kHz, < -100dBc @1Hz. They describe a variant with a high-speed comparator as well (LT1016) but the phase noise is worse.

I'd rather not add an inverter in the 1PPS signal, the TDC manual says it's best to use the rising edge for both start and stop, also the 1PPS signal will anyway be quite jittery, so I'd rather take it as it is and not add another jitter source. The PLL in the MCU will have to deal with the original jitter anyway.

Regarding R6/R7 - I can use 25ppm or better there. Not a problem, resistors are cheap, even with 25ppm TC. 10ppm gets you into 0.5€ in single quantities, but they're readily available, too. I don't think I'll use trimmers here. They definitely have a worse TC than a precision SMD resistor. If I want to change voltage, I'd rather change resistors.

The opamp is actually a TLC2272A, but the offset voltage TC isn't any better, still in the 2µV/°C range.

Still, on the topic of temperature stability, wouldn't the control loop eventually correct the offset? Of course there will be a drift while the temperature changes, but if it happens slowly, the control loop will be able to keep up and stay in lock. It's important for the hold-over case of course, but then an active temperature compensation will be necessary anyway. The STM32 has a built-in temperature sensor, maybe it's good enough for that.

Regarding the power dissipation of the 7805 - I'm using a DPAK package and there will be ample copper for cooling. The variant I chose has a TC of -0.3mV/°C
However, I'm going to change that to a 12V type and rather provide separate point-of-load regulators for the digital and the analog parts, instead of trying to decouple the domains via an LC filter.

Single circuit inverters - there's indeed a lot of them available. But most of them have Schmitt trigger inputs, would that be a problem?

The 24V supply will be taken from another project of mine, I already have a small PCB for the LPRO with overvoltage and reverse polarity protection, I will reuse that circuit.

BTW, the LPRO-101 has a trimming range of around 3 ppb over 5V, or 0.006Hz/V. I don't think I'll be in trouble for this particular use case. But the design should be versatile enough to support a standard OCXO, too, with only BOM changes.

[iMo]

Schmitt triggers are ok. Except the squarer, it should stay 04.
I would try with the opamp first on a breadboard whether the opamp works as expected (input 0-2.5V, look at output).

PS: this is a squarer I've been using. Tune L1C1 for the input frequency. The LC is a parallel tank. Keep R1 and signal source impedance low.
It creates up to 6-7Vpp at the HC input. Will be limited by clamping diodes, so you will see almost a Vdd p-p square. HC14 should work too.

[Dbldutch]

Thinkfat,

My suggestion if I may, would be to move whatever is needed to square, buffer, drive and power the oscillator to a seperate board where the oscillator is on. This will allow you to test various oscillators while keeping the controller board universal.

I did the same with my prototypes and it allowed me to quickly change from a Bliley with sine wave output to an Isotemp with a square wave output. Also the circuit to drive the VC is most likely depending on the oscillator type, so it should go on that board too.

[Dbldutch]

Imo,

I really appreciate your contributions and insights, although at times they can be a bit cryptic.

In a post just above you have this advice :” Schmitt triggers are ok. Except the squarer, it should stay 04.” Unfortunately, you don’t offer the reason or rationale.

When you discuss your own very interesting squarer design, you say “HC14 would work too.” As the HC14 is a Schmitt trigger, I’m a bit confused.
What is there against using a HC14 in a squarer in the first place?

[Dbldutch]

Metrologist,
“ Re: ISR discharge. Would it be better to set the pin open at start of the ISR and then leave it low on exit?”
That won’t work because the ISR is activated after the TIC pulse is converted. I show that in a very early screenshot that shows when in time the ISR actually happens.

[iMo]

1. In a post just above you have this advice :” Schmitt triggers are ok. Except the squarer, it should stay 04.” Unfortunately, you don’t offer the reason or rationale.
..
2. When you discuss your own very interesting squarer design, you say “HC14 would work too.” As the HC14 is a Schmitt trigger, I’m a bit confused.

1. With the original squarer (7404) you put the 7404 into a linear mode (aka amplifier) by the resistor wired between output and input. It works with the standard 7404, it does not work well with Schmitt trigger (because of its hysteresis), however.

2. The wiring with an LC is using the LC as "an amplifier". The Q of the parallel LC tank amplifies and cleans up the input signal, so it works with 7414 as well.

You have to tune the L1C1 to the input frequency (ie 10MHz). L1C1 works as an amplifier and filter then - see below the amplitude of the signal at the 74HC input with 2 different C1 (25.2pF is closer).

PS: Below I added a "noise" to the input's 10MHz sine signal (a square wave ripple). You may see how the LC filter cleans the signal at the input of the 74HC up.

[thinkfat]

The output from a Rb-locked VCXO is usually not really noisy, however. In my case, I'm pretty sure I won't need a lot of cleanup before I feed the signal into a 7404.

Anyway I don't want to derail this thread any further. My own design is about as far from the "Lars DIY GPSDO" concept as it gets. I'll start a new thread on this board when I have the PCB done.

Thanks all for the valuable input!

[iMo]

@thinkfat: do not forget to add an external flash (ie fram spi) for your calibration constants.
Also add serial resistors in TX/RX (both for NEO and PC uart), ie 100-220ohm.

[Dbldutch]

For the past couple of days I have been running tests on my new (used) Isotec 143-141 OCXO.
I already reported that this OCXO is partially broken, because it does not have a ref Voltage output.
The supplier gave me a full refund, so that's good.

I have been struggling with this OCXO however, and I want to share some of my observations.

The frequency out, with nothing attached to the VC input is just about spot on.
The adjustment range is pretty well centered at 1.9638V.
I have created a finer VC adjustment with a couple of resistors such that H1 will create a voltage of 1.773V and an avg of +186ns. H64K creates 2.152V and an avg of -200ns, resulting in a frequency delta of +/- 2Hz. The gain is calculated to be 170.

So far so good.
Attached are some Excel plots taken with a damping of 0.5 and a TC of 32. (Isotec.jpg)
The board with the OCXO is in a plastic container so no draft. The LM35 sensor is well pressed to the case, temperatures are stable.
Note the very regular swings in the ns and DAC values.
It seems to me that this OCXO is behaving weird and the PI does not get it under control. I do have a stable lock, but on my scope it looks jittery.

I have played with the damping factor, and when I progressively go to the maximum setting of 10.0, it's improving a lot, but far from stable. (Isotec d10.jpg)
As soon as I change the TC to a value of 100, I loose the lock right away.

What do you guys make of this specimen?

[iMo]

FYI - I got the same with my OCXO in past (double ovenized Trimble thermo isolated) - and I changed to XOR analog one afterwards Either oscillation like in your picture, or large random walk. You also confirmed my above estimation of aprox. 50ns p-p noise.
I think it could be related to: a) too noisy OCXO (or its regulation loop), b) finetuning the PI regulator's coefficients, c) the period of the DAC corrections.

PS: one important measurement is to disconnect the EFC wire and measure the free OCXO walk against 1PPS.
PPS: d10 picture: your OCXO gain is aprox 10Hz/V. With 125 DAC units average drift (9.5mV) OCXO drifted 0.095Hz in 5000secs. That could be an initial drift after long power off. The loop compensated for it. An OCXO switched off for long time needs several weeks to settle, people say.

[Dbldutch]

Here is the Isotec free running, with my hand-adjusted synchronization to the 1PPS.
The spikes are when the TIC counter overflows at the 0 and 1,000 ns points.

This is only about 1,000 samples, but overnight shows the same thing.

The OCXO itself does not seem to be the problem for the oscillation.

I have also attached the schematic I used for the Isotec with the broken VRef output.
Any suggestions for improvements?

Funny enough, with a damping of 10.0, I can now get up to a TC of 500 already without loosing my lock. (1,000 fails)
Maybe the extra powered-on time made the difference as imo already hinted at.

[iMo]

Short comment:
1. 78xx are the poorest performers in terms of TC and noise, it could be the fluctuations come from there (I would replace the 7808 with something better)
2. pot trimmer - I would avoid it, large TC of resistance and of wiper contact
3. resistors around the EFC input - should be low TC ones
4. LM35 - with longer wires put a "68-82ohm ser 10u MLCC" between its output and gnd (close to its pins).

[iMo]

Free running picture - what is the 4usecs difference in 1000secs? I doubt it is the drift of your free running OCXO (aprox 4Hz in 1k secs)..

[thinkfat]

According to control theory rules of thumb, if your regulator is oscillating, your gain is too high for the response time of the process. I part of a PI regulator can also cause oscillation, should be small against P.

If I understood Lars' PI regulator correctly, try with less gain and shorter TC? But I might be completely off, I'm far from being an expert. But TC much shorter than the settling time of your PWM filter doesn't make sense as well.

[iMo]

FYI - here is the Lars' PWM DAC simulation.
It settles in about 3.8secs from 0V to 1.35V.
The PWM freq is 480Hz (arduino lib). R4/5 are the ESRs.
The p-p ripple is about 10uV.

[thinkfat]

There is no need to wire the start and stop pins together. The start pin will be wired to, for example, 1PPS and the stop pin to the OCXO's 500kHz. There will be none 4046. 7200 will measure the "time between the rising edges of those two signals" - it returns the difference "stop_rising_edge-start_rising_edge". Thus the same as it is today with analog TIC.
The 7200's start and stop pins are both rising edge sensitive.

I still have one question regarding the design you proposed - you've connected the 500KHz and the 1PPS signals to interrupt inputs of the MCU. I thought of only using the INTB output of the TDC to signal completion of a measurement to the MCU. That should be sufficient, no? Or did you have another reason to hook up those signals?

[iMo]

I do not know. You are going to write your own fw so it depends. You may use the INTs based on the 1PPS and 500kHz edges as well for something. I think Lars' version is using that somehow (I do not use Lars' system).

PS: Lars is using the 5MHz for feeding the Timer1 (200ns clock) for some internal purposes - (ie. he captures the Timer1 value at the beginning of the 1PPS ISR, he uses "timer_us" variable for "timer1 value in microseconds offset from 1pps").

For compatibility reasons I would feed 5MHz to the TimerX input as well. You will see whether it is useful or not.

[Dbldutch]

imo,

I don't really understand what you mean with this "what is the 4usecs difference in 1000secs? I doubt it is the drift of your free running OCXO (aprox 4Hz in 1k secs).."

I have only shown one cycle, of many, many others during the long test.
Here is a bit larger section of the ns values during the free running oscillator run.
Does this clarify?