LC filter before LDO

[Northy]

Hi,

I've got a board with an open frame switcher at one end (mounted in the chassis), an LDO powered by the switcher in the middle of the board and another LDO powered by the switcher at the opposite end to the switcher. The board is about 14" long.

At the input to each LDO I've put a C/L/C Pi filter (but the L is a ferrite bead).
Values:
10uF (MLCC) -> 220R @ 2A BLM21PG221SN1D -> 2 x 10uF (MLCC) -> LDO
Each LDO is only supplying a few mA (I need to measure the exact value).

The open frame switcher supplies 5V to the board and there is 1 x 2200uF Electrolytic and 2 x 100uF (MLCC) ceramics near the input connector.

The LDO in the middle of the board is fine, but Pi filter is ringing on the one furthest away from the switcher.

I know I'll need to do some measurements and tests but I was just wondering what things others would recommend?

Replace L with small R? I could probably live with a small voltage drop.
Install small R in parallel with L?
Replace L (ferrite) with a proper inductor?
Add more capacitance?
Add another capacitor with a resistor in series with it?

Thanks,

G

[David Hess]

My guess is that the inductance of the wiring is ringing with the first 10uF MLCC.  I might replace the first capacitor with a solid tantalum or aluminum electrolytic for a higher ESR to dampen the ringing.

Running the long power wires to the regulator as twisted pair to reduce the inductance from the loop area might also work to suppress the ringing.

Low ESR ceramic capacitors are for short lead lengths and low impedances.

[KE5FX]

I'd be tempted to simply install 0805 resistors in place of the ferrite beads, then omit the 10 uF capacitors on the upstream side of the resistors.   Or failing that, just omit the upstream capacitors and leave the bead in place.  As David says the ringing is likely in the wiring, not the bead, and low ESR is not always your friend when wire lengths over a few cm are involved.

A couple of ohms should be fine.  Watch out for both the power dissipation and series current ratings of the resistor, of course.

[T3sl4co1l]

Mind that the ferrite bead is nowhere near "220R @ 2A", the current rating is thermal only.  In fact the impedance drops precipitously under bias.  Murata does not provide these data but a comparable part from Laird like HI0805N221R-10 shows impedance (at 100MHz) dropping by 73% at 500mA.

If you're not drawing as much current, impedance will be somewhere inbetween.  If this or more, it's likely the chip is little more than stray wiring inductance.

It's good practice to throw in some lossy caps, if not electrolytics or tantalums, then ceramic with resistor in series.

Trace inductance is in the 1nH/mm ballpark, including component body length, via height, etc.  You can essentially read the equivalent circuit off the layout.

Tim

[Northy]

Hi all,

Thanks for all the replies, very helpful.

Just some more info, the LDO's aren't fed from long wires. The switcher plugs int the board with a short wire then the +5V makes it's way to the LDOs on a pretty wide pour on an internal layer down the board.

On the input side of the ferrite bead the power rail looks ok (the same as the input), it's after it that the rail gets very messy.

Is there a way to calculate if this sort of thing is likely to happen from the design so I can avoid it in the future?

Regards,

G

[Siwastaja]

Try to solder some 100uF electrolytic caps from your junk part bin in parallel with the MLCCs on both sides.

[T3sl4co1l]

You said the board is 14" long, that's a good 200nH+ end to end.  You haven't provided a layout so I have no way to tell if that's a representative figure or not, but I have provided the information above to make that estimation.

What does 200nH resonate with 10uF at?
Zo = sqrt(L/C) = sqrt((0.2uH) / (10uF)) ~= 0.14R
Fo = 1 / (2 pi sqrt(LC)) = 1 / (2 pi sqrt((0.2uH)(10uF))) = 112kHz

Zo works against the ESR of the cap in question (probably the 10uF on the long trace), forming a series resonant tank with Q ~ 14 say.  Which in turn means an impedance peak up to about 2 ohms at the capacitor.

Seems like a frequency that wouldn't be very friendly to an LDO, is that your problem -- excessive ripple passing the LDO?

What's the source of ripple anyway, other loads?  A "few mA" LDO isn't much of a load, certainly nothing to warrant stacking 40 more uF into a design.

Speaking of big ceramics, those 100uF are probably not 100uF under bias, has that been checked as well?  They might not be needed at all if the 2200uF is doing its job.  (And is that much really needed?  What are the other loads doing?)

This is the study of PDN (power distribution network) analysis, you can draw out the equivalent circuit and simulate it if you like.  See what values do well, or lead to strong impedance peaks or poor filtering, etc.

Tim

[Siwastaja]

Just assuming 1nH/cm and drawing a stupidly simplified equivalent circuit (basically, your circuit + parasitic inductances) allows gaining some understanding through SPICE simulations. You can try out what happens when you increase ESR of the parts, for example.

[Northy]

Hi all,

Thanks for your help, I've been busy measuring and trying to work stuff out today. I got a few things wrong 

The LDO draws 107mA, so more than a few mA.
I actually realised that the LDO was at fault, it was oscillating. It's a highly strung animal and I'd put too much capacitance on it's output. I've sorted that now.
So things have calmed down in that regard.

However, I've got a low frequency signal literally on EVERY power rail I look at, ~300Hz.
I've tried all sorts of things to try and find it and get rid of it, but no real luck so far.
The reason it's a problem is it seems to be affecting the noise floor of the ADC measurements.

Thanks,

G

[T3sl4co1l]

Sanity check, is it on GND too?

Tim

[Northy]

Sanity check, is it on GND too?

Tim

Hmmmmm, yes it seems to be, but to a much lesser extent.
It's seen mainly on +5V.

Thanks,

G

[ANTALIFE]

Heh I was dealing with something similar not long ago (pi-filter for power coming into a secondary board)

I ran some LTspice simulations and found that using a ferrite bead with larger impedance (above 8R) resulted in ringing for my transient simulations:
https://www.antalife.com/2021/06/project-half-life-2-ar2-update-10-power.html

So yea I suspect your 220R bead is too high an impedance which results in oscillation when combined with the MLCC's (and other parasitic elements in your circuit). Also suggest adding a "high ESR" electrolytic to help dampen any further oscillations, or alternatively you could add a high wattage inline resistor 

[Northy]

Sanity check, is it on GND too?

Tim

So does this mean that the 5V rail is getting affected by something taking big surges of current? Or something else?

G

[T3sl4co1l]

Heh I was dealing with something similar not long ago (pi-filter for power coming into a secondary board)

I ran some LTspice simulations and found that using a ferrite bead with larger impedance (above 8R) resulted in ringing for my transient simulations:
https://www.antalife.com/2021/06/project-half-life-2-ar2-update-10-power.html

So yea I suspect your 220R bead is too high an impedance which results in oscillation when combined with the MLCC's (and other parasitic elements in your circuit). Also suggest adding a "high ESR" electrolytic to help dampen any further oscillations, or alternatively you could add a high wattage inline resistor

Note that those are linear models, which won't capture the current-dependent inductance and loss of a real bead.

I've attempted to model this before; here's a not-terrible one:
https://www.seventransistorlabs.com/Modeling/SPICE/MI1206L391R_NL.ckt
from: https://www.seventransistorlabs.com/Modeling/

The effect of nonlinearity is, you'll still get the same transient, at very low signals (no DC bias, perhaps some mV of AC); at large signals (100s mV?) or under bias, you'll get something more resembling the lower-Z plots.

Ideally, the capacitors would be modeled as well, as they have the exact same behavior with respect to bias voltage.  A direct consequence of this is inrush surge voltage, which can be much more than double the input voltage (a peak of double, is the lossless linear case).  Strategies to avoid this include a TVS (clamps the peak directly), or lossy capacitor (typically electrolytic) to dampen the transient.

Tim

[T3sl4co1l]

Sanity check, is it on GND too?

So does this mean that the 5V rail is getting affected by something taking big surges of current? Or something else?

Well, it means it's not an isolated case.

Further sanity check: is it ground loop?  -- Do the scope and EUT share a ground connection other than the probe?  If so, probe circuit ground without attaching the probe ground clip.  This signal is dropped across the EUT ground return path, evidently.  Should it be doing that?  Do you need to update filtering or wiring?

If not common ground, galvanically (isolated), then what about at AC, are there "Y" type capacitors between grounds anywhere?  This is in the frequency range where either case could be relevant (direct or capacitor-coupled AC grounding).

Finally, is it identical to, and in (or exactly out of) phase with the 5V signal?  What does this tell you about where the currents are flowing?

In general: draw the equivalent circuit, reducing cables to common mode or differential mode equivalents for example, and see where sources and sinks of these signals might be going.  Model the PDN and see if it needs more damping.  Model the ground network and see if it needs improvement (ground planes everywhere!).

Tim

[Northy]

Hi Tim,

Thanks for your reply.

Further sanity check: is it ground loop?  -- Do the scope and EUT share a ground connection other than the probe?  If so, probe circuit ground without attaching the probe ground clip.  This signal is dropped across the EUT ground return path, evidently.  Should it be doing that?  Do you need to update filtering or wiring?

Both EUT and scope are 'Earthed'. The EUT has a metal chassis.

Finally, is it identical to, and in (or exactly out of) phase with the 5V signal?  What does this tell you about where the currents are flowing?

I'll check. Is this with one probe on +5V and one probe on 0V?

In general: draw the equivalent circuit, reducing cables to common mode or differential mode equivalents for example, and see where sources and sinks of these signals might be going.  Model the PDN and see if it needs more damping.  Model the ground network and see if it needs improvement (ground planes everywhere!).

I'm not to sure how to do this. Could someone please explain further?

Thanks

G

[Northy]

Hi all,

I'm hopefully going to get time to look at this again tomorrow.

Does anyone have any more (dummy's guide type) words of wisdom to help me try and work out what's going on here? I've never experienced anything like this before.

Could it be that the connections from the PSU input connector are too inductive? Is there any test/bodge that could prove that?

Thanks,

G

[T3sl4co1l]

Can you produce photos/diagrams showing the relevant connections on the board, component placement, etc., and wiring to it, power supply etc.?

Tim