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Level shifting

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Benta:
Scratch my reply above, you've solved it :)

The only thing that might be necessary is a capacitor to ground from the 74HC4066 lower switch end. Try 1 uF.
The spikes will probably go away with a better analog switch. But if you can't find DG417/419, oh well. What you've achieved here is good enough.

syntax333:
Thank you very much for your answers and guidance along this journey of mine.  :)

There are still to much to learn about electronics for me so without the proper guidance I wouldn't be able to achieve this results.

OK I will place 1uF across "R6".

Also is the 10k enough for "Re" value of emitter follower (npn) or should I increase it more? What is the limit here? Why can't I just put 10M?

I will probably order some DG417 from foreign companies while waiting I just wanted to do some experiment with this circuit.

Benta:
You're welcome.
There's no reason to increase Re further, in fact it's already a bit high. 4.7k might be closer to the mark.
You're not at the end of the journey yet. The next point is to see how the circuit works when a load is connected.
But the basic function is there, and it works excellently.

syntax333:
I will load the circuit and share the results as soon as possible.

Besides that I have couple of questions.

What is downside of large Re? You said that it is bit high, how did you decide that? I am familiar with regular emitter follower circuit however I have never used them in this configuration.
While I was researching I found that this configuration is used mainly to get rid of the dc offset, however I couldn't find any source that shows design procedure.
Can you explain or give reference for this circuit so I can learn more about this configuration?

Benta:

--- Quote from: syntax333 on January 08, 2019, 12:37:01 pm ---What is downside of large Re? You said that it is bit high, how did you decide that? I am familiar with regular emitter follower circuit however I have never used them in this configuration.
While I was researching I found that this configuration is used mainly to get rid of the dc offset, however I couldn't find any source that shows design procedure.
Can you explain or give reference for this circuit so I can learn more about this configuration?

--- End quote ---

The first Re supplies base current to the PNP emitter follower. If you make it 1 Mohm you'll starve the transistor completely of base current.

The complementary emitter follower quite correctly conserves the DC level of the signal. A simple emitter follower shifts the signal by Vbe (~0.65 V). By having and NPN and a PNP stage, this is eliminated.

It's not my invention :)  I first noticed the circuit many years ago while repairing VCRs and shamelessly copied it for my own designs.

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