LM5106

[Pack34]

To reduce the number of PWM outputs that I need, I was looking at the LM5106 and was wondering if anyone here had some experience with it. It's intended purpose is to be a FET driver with a programmable dead-time between the PWM pulses.

My only concern is the effect of leaving the high side source and boot strap connections floating and if that would have an impact on the output signal on the high side output.

LM5106 Datasheet
http://www.ti.com/lit/ds/snvs424c/snvs424c.pdf

EDIT:// Just to clarify, I know how an H-Bridge works and why the boost rail exists. It looks like leaving the high-side source pin floating should give me the output that I need, I was just wondering if someone here had experience with the chip so I wouldn't have to have breakout boards made to test the chip on my bench.

[free_electron]

It would help if you explain what it is you are trying to do.

leaving the bootstrap disconnected will not work. this chip is a half bridge driver. you can not run this at 100% duty cycle nor at 0% duty cycle. there needs to be residual switching for the bootstrap pump to work to create the drive voltage for the top fet.

[Pack34]

I'm looking at implementing an array of H bridges with a minimal amount of source PWM lines. To keep my circuit as small as possible I'm looking at utilizing an H-bridge chip to take care of the motor driving instead of building my own. What I need to supply it are the two source PWM lines to command the internal H-Bridge.

I am looking at the LM5106 due to it taking care of dead-timing the H-Bridge input as well as generating the second complimentary PWM. These two PWM channels would then feed into the H-Bridge solution.

If I can do this then I'd be able to mvoe forward with a single microcontroller solution as eight channel PWM chips are fairly common but I haven't been able to find a micro that has more than two complimentary PWM channel outputs.

Toshiba TB67H301FTG Datasheet
http://www.semicon.toshiba.co.jp/info/docget.jsp?type=datasheet&lang=en&pid=TB67H301FTG

[Pack34]

It looked like it would work on paper but, it's a no-go. Instead of trying to use a one chip solution I decided to just make my own and be done with it.

The basics of it is to start with the source PWM signal, say 20kHz, then split the signal using a 2NAND gate and a 2AND gate. The NAND inverts the signal on that branch and the purpose of the AND gate is for timing purposes. After this, each branch feeds into it's own 2XOR gate with one input being delayed using a basic RC circuit. According to the basic simulation tool I used, it seems like it should work.

Thoughts?