Author Topic: Logic-ICs - die pictures  (Read 1177 times)

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Offline Noopy

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Logic-ICs - die pictures
« on: January 25, 2021, 09:34:49 pm »
Let´s take a look into some logic ICs.
You can find an overview here: https://www.richis-lab.de/logic.htm




First logic IC is a CPLD, a Lattice ispLSI1016.
The LSI1016 is the smallest CPLD of this model range. The isp variant can be programmed in circuit.
16 logic blocks, 2000 gates, 96 register, 36 I/Os, max 80MHz, max delay 15ns




The die is quite big: 6,1mm x 4,1mm
The datasheet states that the ispLSI1016 was manufactured with a 0,8µm process. Challanging my capabilities.  :-/O ;D




A 1992 design.




A first revision?
Quite a lot of masks.








In the dicing area there are quite some symbols and test structures.




Developer initials?  :-//




Here you can see an I/O bondpad. On the top of the bondpad there is the input structure. At the left and the right sides of the bondpad there are the Push-Pull-transistors.




Here you can see an input stage. I assume the big structures are clamping diodes. Behind the clamping diodes there is a small resistor and a transistor probably acting as a pull-up or pull-down.




The structures are quite small but you can identify the big functional blocks.




There are a lot of small structures between the bondpads which probably do some housekeeping.
Here you can see one of the more interesting circuits. Perhaps a small memory? Perhaps a multiplexer for connecting the distributed memory cells?




Global logic block and I/O cell. Between the two you can spot the 16 lines of the output routing pool.
(Quite likely, you can´t be 100% sure.)




Global logic block input logic array.




Global routing pool, in there are quite a lot of interconnections with their memory cells.


More pictures here:
https://www.richis-lab.de/logic01.htm

 :-/O
 
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Online ataradov

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Re: Logic-ICs - die pictures
« Reply #1 on: January 25, 2021, 09:49:49 pm »
SJDC - San Jose Design Center.
Alex
 
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Offline RoGeorge

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Re: Logic-ICs - die pictures
« Reply #2 on: January 25, 2021, 10:27:20 pm »
Thank you, subscribed!   :popcorn:

Offline exe

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Re: Logic-ICs - die pictures
« Reply #3 on: January 26, 2021, 05:55:59 pm »
A first revision?
Quite a lot of masks.

So, masks are used to amend errors on photo templates?
 

Online ataradov

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Re: Logic-ICs - die pictures
« Reply #4 on: January 26, 2021, 06:01:38 pm »
No, by "masks" he meant the photo template. That's how they are called in the industry.

Each test structure represents one mask. And this is a lot indeed. But configurable devices are complex in their design.
Alex
 

Offline Noopy

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Re: Logic-ICs - die pictures
« Reply #5 on: February 23, 2021, 01:36:37 pm »


D146, a BCD/7-segment decoder built by HFO.




3,0mm x 1,8mm




Test-transistor...  :-/O




The SN7446 datasheet contains a logical schematic (Texas Instruments, 1988).




Well we find everything shown in the shematic.
The two input gates at the inputs A-D are marked in pink. The purple squares are the output transistors of the eight gates.
Between the inputs you see the lamptest circuit (green) and the blanking circuit (black).
The outputs of the input gates are connected to the decoder matrix (dark green) containing both, the connection matrix and the AND-gates. The big gate of the blanking circuit is placed in this area too. The blue parts are the pull-up-resistors for the decoder.
On top of the decode area there are seven NOR-gates with two or three inputs (orange). There are yellow pull-up-resistors and the last parts are the output transistors (red).




Here you can see the input gates.
The first gates are built with an input stage (buffer or AND), a phase splitter and an output lowside transistor. There is no highside transistor but there is a diode connecting the pull-up-resistor of the phase splitter to the output. In the second gates they spared the phase splitter.
The input of the gates are built with transistors with big base areas in which there are one (buffer) or two (AND) emitter areas forming the inputs. The buried collector is the output of the gate input stage.




In the middle of the die there is the decoder containing 19 multi emitter transistors.




The upper contact is connected to the collector. The lower contact is connected to the base area. In the base area there are some emitters connected to the outputs of the input gates.
There is one rotated transistor. That´s the big gate for the blanking of the 0. This gate works with the same input signals so it was reasonable to place the gate in this area.




You can spot every logical connection formed with a emitter and its contact.
But what´s that? There is an additional connection not shown in the SN7445 datasheet: B1/a2




With this connection you get two more segments.
In my view that 6 looks better.  ;D




Here you see the seven NOR-gates and the output transistors.




Nothing special...
There is an substrate connection at every transistor to prevent ground bouncing in the die.


https://www.richis-lab.de/logic02.htm

 :-/O
 
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Offline Noopy

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Re: Logic-ICs - die pictures
« Reply #6 on: February 23, 2021, 05:15:26 pm »
Minor corrections:




Compared to the 7446 there are two additional connections (yellow).




Symbol 6 and symbol 9 are different to the 7446. Symbol 12 is not different.


=> The D146 is more like a 74246 not like a 7446.  :-+

 
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Offline Noopy

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Re: Logic-ICs - die pictures
« Reply #7 on: March 14, 2021, 09:27:22 pm »


Now let´s take a look into a ispLSI1024.




The LSI1024 has one megablock more than the LSI1016.




The die is 6,5mm x 5,8mm.












A lot of test structures.




There are also some more complex structures in the slicing area.




The LSI1024 was designed in 1991 while the LSI1016 was designed in 1992 (perhaps the second revision?).




HD24-00, the first revision of the "HD24"?




Push/Pull-Transistors and input protection at the bondpads.




...
A lot of small circuits are placed in the bondpad area.




The LSI1024 is quite similar to the LSI1016 but here we have a third megablock. Since the third megablock is cut in two pieces they needed an additional connection line in the upper area.




Let´s take a look into one of the eight segments of the megablock.




Here there should be two I/O cells.




Global-Logic-Block




Global-Logic-Block connection array




Global-Routing-Pool


Some more pictures:

https://www.richis-lab.de/logic03.htm

 :-/O
 
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Offline aheid

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Re: Logic-ICs - die pictures
« Reply #8 on: March 15, 2021, 02:13:16 am »
Love your threads, excellent stuff! Very interesting to look under the bonnet, so to speak.
 

Offline Noopy

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Re: Logic-ICs - die pictures
« Reply #9 on: March 15, 2021, 04:08:37 am »
Thanks for the positive feedback!  :-+ That keeps me taking more pictures.  8)

Offline Noopy

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Re: Logic-ICs - die pictures
« Reply #10 on: April 11, 2021, 09:23:58 pm »
I have some different controller periphery chips. Will post them here.




Mitsubishi M5L8288, a bus controller for a 8086 processor.




Two bondwires for the supply. The seven command outputs can sink more than 220mA. That is not too much for one bondwire but the voltage drop can cause switching problems.




Mitsubishi used two metal layers.




The name of the design?




Some symbols to check the production quality.




Around the die the two metal layers distribute the supply voltage.




The command outputs. Between the bondpads there are the big lowside transistors. On the left side of the bondpads there are the smaller highside transistors.
Wide metal stripes supply the outputs.




Here we have one of the weaker outputs. The lowside transistor (right of the bondpad) is bigger than the highside transistor (above the bondpad) but both are smaller than the transistors of the command outputs.


https://www.richis-lab.de/chipset01.htm

 :-/O
 
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Offline Noopy

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Re: Logic-ICs - die pictures
« Reply #11 on: April 19, 2021, 02:07:54 pm »


ispLSI1048E, the biggest CPLD of the LSI10xx family. The index E is a an update of the index C which is an update of the ispLSI1048.




Although the ispLSI1048E is much more complex than the ispLSI1024 (https://www.richis-lab.de/logic03.htm) the die is smaller: 5,9mm x 4,7mm. It´s clearly a newer design.




Yes, designed seven years after the ispLSI1024.
The lines are clearly thinner.




There are circuits between the bonpads as we have seen in the smaller CPLDs.




The LSI1048 consists of six megablocks each built with eight GLBs (global logic blocks). The 48 GLBs are placed in groups of four on the left and on the right side of the die.
The GRP (global routing pool) is integrated in the middle of the die.




Here you see a group of four GLBs with it´s portion of the GRP.




GLB




GLB logic array




GRP




I don´t know why the GRP is not symmetrical. Well we don´t know how it is partitioned.


https://www.richis-lab.de/logic04.htm

 :-/O
 
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Offline Alex Eisenhut

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Re: Logic-ICs - die pictures
« Reply #12 on: April 19, 2021, 03:43:58 pm »
These pictures are ... to "die" for!

 :-DD
*Except AC/DC adapters on eBay. Avoid them all!
 

Offline Noopy

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Re: Logic-ICs - die pictures
« Reply #13 on: May 02, 2021, 01:01:39 am »
...
D146, a BCD/7-segment decoder built by HFO.
...




The D147 does the same as the D146 but the maximum output voltage is only 15V (vs. 30V of the D146).




As we would have expected the design of the die is the same. Probably they did some binning.




There is a small defect in the metal layer above one of the output transistors.




And a nice pictures of the test-transistor.  :-/O


https://www.richis-lab.de/logic02.htm

 :-/O
 
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Offline Noopy

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Re: Logic-ICs - die pictures
« Reply #14 on: Yesterday at 07:43:22 am »


For today I have a less interesting part: К555NE7 / K555IE7, the soviet version of the SN74LS193.




Here we have the brown mold compound that allows light to get to the chip. In some circuits that leads to a strange behaviour as soon as you change the light incidence.




Sorry, not the best pictures in my "career" (2,2mm x 2,2mm).




The left test structure seems to be a normal NPN transistor. The right test structure could be a PNP transistor.  :-//




Here we have three different resistors. Probably base and emitter doping and a pinch-resistor.


https://www.richis-lab.de/logic05.htm

 :-/O
 
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