Electronics > Projects, Designs, and Technical Stuff
Long SPI bus lines - should I use series resistors?
HwAoRrDk:
Thank you all for the suggestions and information, particularly Siwastaja for the in-depth review. :-+
I haven't actually constructed anything yet; I'm just at the design stage. All I have done so far to look at the existing signals on the bus is to put a logic analyser on it and inspect the content of the communications. Of course, that will not tell me anything about the nature of the signals, so I will have to put a scope on each line (cheap scope, no many-channel action for me :'() and see how they look with the original standard configuration.
I think I will put 100R series resistors into my design for the moment, located after the point where the '365's and my MCU's SPI lines join. Attached is the current rough schematic of how I have my design for the SPI bus splitting section at the moment.
When I get around to constructing a prototype, I will then be sure to look at the signal when operating the split master side at 1MHz and see if I need to change the values. Perhaps add some capacitors, a few hundred pF maybe. I could even always put both on my final design just in case and not populate the caps if unnecessary.
One thing that I hope may help keep a cleaner signal than otherwise is that within the original 12-wire harness going to the LCD, three of them are ground wires (all commoned).
Siwastaja:
For even better performance, you could use separate 100R resistors for both MCU and the buffer, so that the resistors can be closer to the source. This would have an added benefit that if you ever accidentally enable both MCU outputs and the buffer at the same time, 200R would then completely protect both outputs from excessive short circuit currents. (This might be a non-issue, since it's fairly easy to write the software to guarantee they are not on simultaneously, except some super rare freak incidences.)
Probably not a big thing, and the BOM / PCB estate reduction may be worth only using one set of resistors, especially if the buffer and MCU are within only a few cm of each other.
HwAoRrDk:
Good point, I hadn't thought of that. I will have to see if I can fit that into my final layout.
If only they made 5 or 6 element SMD resistor arrays, it would be easy. :)
I will be making every effort in my code to not allow the master SPI outputs and the buffer to be enabled at the same time, but like you say, the unexpected can happen, so probably best to try and mitigate that.
r0d3z1:
--- Quote from: Siwastaja on April 17, 2018, 07:34:36 pm ---Just to give an example, a combination of 470R and 1nF would result in an RC time constant of 0.47 us. Assigning 10% of time to transitions, this would ballpark to a usable frequency of around 100kHz. 1nF capacitor would require quite some significant noise energy to be injected to change its terminal voltage to give false input reading. Now, with 2k2, the capacitor would only be 220pF. Still a huge improvement over just the pin parasitics, but given the higher level of noise coupling due to higher output impedance of the driving side, the capacitor has more to do. Hence, I'd choose 470R+1nF over 2k2+220pF.
--- End quote ---
thanks, good explanation. I would like to ask you further details about the RC filter, there are various way to place the filter:
* source -> RC -> cable -> receiver (slow edge on cable, low emission, low coupling, not very effective for EMI immunity)
* source -> cable -> RC -> receiver (effective for EMI immunity, doesn't solve coupling between signal)
* source -> R-> cable -> C -> receiver (quite sharp edge on cable, quite effective for EMI immunity, maybe a good compromise)
* source -> R/2 -> cable ->R/2 C -> receiver (quite sharp edge on cable, veryy effective for EMI immunity, maybe a good compromise)
* source -> R/2 C-> cable ->R/2 C -> receiver (the best ?)
* source -> RC -> cable -> CR -> receiver (seen here https://electronics.stackexchange.com/questions/35091/alternatives-to-spi-because-of-emi)
I would probably select the 4th solution, however the solution 6 proposed here https://electronics.stackexchange.com/questions/35091/alternatives-to-spi-because-of-emi from user3624 seems to be interesting but I can't understand the meaning of "What I would do is to put an RC filter on the PCB at both ends of the cable. The RC filter would have the C on the cable side and the R on the chip side."
T3sl4co1l:
FYI, it's generally better to put resistance towards the cable. Capacitance towards cable encourages resonance, increasing peak voltages (at far end) and currents (at C end) at resonant frequencies. If those peaks happen to line up with harmonics from the signals within, you can get increased emissions; likewise if an ambient noise source happens to transmit at those frequencies, you can get increased susceptibility.
Whereas, keeping resistance towards the cable encourages damping or termination, including for common mode noise.
Ferrite beads are an excellent source of RF resistance, without adding much DC resistance. Good idea for output pins when you don't know if the load is hi-Z or not. (Plain R is fine when you know the load is hi-Z, like CMOS logic inputs.)
The ideal filter network is, say: series R, parallel C, parallel ESD diode, series R. Change R for FB when low-Z is priority. (The series R between ESD diode and chip limits peak surge current into the chip, whereas if they're wired together in parallel, surge currents will be shared.)
Can also use C || (R+C) to dampen a capacitor without adding series resistance, given a few other limitations.
All of these options do quickly multiply the parts count, though, so you may find it's more economical to compromise with a simplified combination. This shows which kinds of things you can expect to be compromised as a result, so choose accordingly.
Also don't ignore filtering ICs -- USBUF01W6 and family for example, a handy shortcut for these sorts of things. For the OP's application, a lower cutoff frequency than this would be desirable, so shop around.
Tim
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