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Low-cost LS/FS/HS USB sniffer with Wireshark interface

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ataradov:
I'm finally releasing the design files for my low-cost LS/FS/HS USB sniffer with Wireshark interface - https://github.com/ataradov/usb-sniffer

This project has been in development for a long time. First it was delayed by my reluctance to work on the GUI for it, then pandemic made parts disappear. Now the parts are back in stock.

The sniffer is based on Cypress CY7C68013A, Lattice LCMXO2 FPGA, and Microchip USB3343 USB PHY.

It integrates with Wireshark, so that capture can be started and stopped directly from the UI, just like for any other interface. Wireshark is not perfect for USB, but very workable.

It can also be used standalone from the command line.

There are example capture files on GitHub.

coromonadalix:
i would  love to get a complete board, if not too costlly


Kudos    :-+

ataradov:
I have no plans to sell assembled boards myself. The total BOM for this should be less than $50 in single quantities and all the parts are available. And there is nothing here that is too hard to solder. The only thing that really needs hot air station is USB3343. And oscillators are much easier with hot air.

spostma:
the PCB you designed is beautiful; it has almost no vias!
I also admire your programming + hacking skills!
Thank you also for open-sourcing so many very useful bare-metal software projects.

About this sniffer project, would it be an idea to add a free-running ADC (with fast sample and hold)
on the D+ and D- lines to get a histogram of voltage level distributions?
That could give an impression of rise times and overshooting of the input signals.

ataradov:

--- Quote from: spostma on June 10, 2023, 09:40:29 pm ---That could give an impression of rise times and overshooting of the input signals.

--- End quote ---
This is not a task for a sniffer. A scope if far better suited for this. Also, ADC capable of sampling 480 MHz alone would cost 100 times more than this whole board. And even 12 MHz for FS mode is no that trivial.

Sniffers are for debugging logical issues, all electrical problems should be resolved by that time.

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